1 /* 2 * 3 * Configuration settings for the Armadeus Project motherboard APF27 4 * 5 * Copyright (C) 2008-2013 Eric Jarrige <eric.jarrige@armadeus.org> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __CONFIG_H 11 #define __CONFIG_H 12 13 #define CONFIG_VERSION_VARIABLE 14 #define CONFIG_ENV_VERSION 10 15 #define CONFIG_IDENT_STRING " apf27 patch 3.10" 16 #define CONFIG_BOARD_NAME apf27 17 18 /* 19 * SoC configurations 20 */ 21 #define CONFIG_MX27 /* This is a Freescale i.MX27 Chip */ 22 #define CONFIG_MACH_TYPE 1698 /* APF27 */ 23 #define CONFIG_SYS_GENERIC_BOARD 24 25 /* 26 * Enable the call to miscellaneous platform dependent initialization. 27 */ 28 #define CONFIG_SYS_NO_FLASH 29 30 /* 31 * Board display option 32 */ 33 #define CONFIG_DISPLAY_BOARDINFO 34 #define CONFIG_DISPLAY_CPUINFO 35 36 /* 37 * SPL 38 */ 39 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" 40 #define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds" 41 #define CONFIG_SPL_MAX_SIZE 2048 42 #define CONFIG_SPL_TEXT_BASE 0xA0000000 43 #define CONFIG_SPL_SERIAL_SUPPORT 44 45 /* NAND boot config */ 46 #define CONFIG_SPL_NAND_SUPPORT 47 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 48 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x800 49 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE 50 #define CONFIG_SYS_NAND_U_BOOT_SIZE CONFIG_SYS_MONITOR_LEN - 0x800 51 52 /* 53 * BOOTP options 54 */ 55 #define CONFIG_BOOTP_SUBNETMASK 56 #define CONFIG_BOOTP_GATEWAY 57 #define CONFIG_BOOTP_HOSTNAME 58 #define CONFIG_BOOTP_BOOTPATH 59 #define CONFIG_BOOTP_BOOTFILESIZE 60 #define CONFIG_BOOTP_DNS 61 #define CONFIG_BOOTP_DNS2 62 63 #define CONFIG_HOSTNAME CONFIG_BOARD_NAME 64 #define CONFIG_ROOTPATH "/tftpboot/" __stringify(CONFIG_BOARD_NAME) "-root" 65 66 /* 67 * U-Boot Commands 68 */ 69 #define CONFIG_CMD_ASKENV /* ask for env variable */ 70 #define CONFIG_CMD_BSP /* Board Specific functions */ 71 #define CONFIG_CMD_CACHE /* icache, dcache */ 72 #define CONFIG_CMD_DATE 73 #define CONFIG_CMD_DHCP /* DHCP Support */ 74 #define CONFIG_CMD_DNS 75 #define CONFIG_CMD_EEPROM 76 #define CONFIG_CMD_EXT2 77 #define CONFIG_CMD_FAT /* FAT support */ 78 #define CONFIG_CMD_IMX_FUSE /* imx iim fuse */ 79 #define CONFIG_CMD_I2C 80 #define CONFIG_CMD_MII /* MII support */ 81 #define CONFIG_CMD_MMC 82 #define CONFIG_CMD_MTDPARTS /* MTD partition support */ 83 #define CONFIG_CMD_NAND /* NAND support */ 84 #define CONFIG_CMD_NAND_LOCK_UNLOCK 85 #define CONFIG_CMD_NAND_TRIMFFS 86 #define CONFIG_CMD_PING /* ping support */ 87 #define CONFIG_CMD_UBI 88 #define CONFIG_CMD_UBIFS 89 90 /* 91 * Memory configurations 92 */ 93 #define CONFIG_NR_DRAM_POPULATED 1 94 #define CONFIG_NR_DRAM_BANKS 2 95 96 #define ACFG_SDRAM_MBYTE_SYZE 64 97 98 #define PHYS_SDRAM_1 0xA0000000 99 #define PHYS_SDRAM_2 0xB0000000 100 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 101 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (512<<10)) 102 #define CONFIG_SYS_MEMTEST_START 0xA0000000 /* memtest test area */ 103 #define CONFIG_SYS_MEMTEST_END 0xA0300000 /* 3 MiB RAM test */ 104 105 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE \ 106 + PHYS_SDRAM_1_SIZE - 0x0100000) 107 108 #define CONFIG_SYS_TEXT_BASE 0xA0000800 109 110 /* 111 * FLASH organization 112 */ 113 #define ACFG_MONITOR_OFFSET 0x00000000 114 #define CONFIG_SYS_MONITOR_LEN 0x00100000 /* 1MiB */ 115 #define CONFIG_ENV_IS_IN_NAND 116 #define CONFIG_ENV_OVERWRITE 117 #define CONFIG_ENV_OFFSET 0x00100000 /* NAND offset */ 118 #define CONFIG_ENV_SIZE 0x00020000 /* 128kB */ 119 #define CONFIG_ENV_RANGE 0X00080000 /* 512kB */ 120 #define CONFIG_ENV_OFFSET_REDUND \ 121 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) /* +512kB */ 122 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE /* 512kB */ 123 #define CONFIG_FIRMWARE_OFFSET 0x00200000 124 #define CONFIG_FIRMWARE_SIZE 0x00080000 /* 512kB */ 125 #define CONFIG_KERNEL_OFFSET 0x00300000 126 #define CONFIG_ROOTFS_OFFSET 0x00800000 127 128 #define CONFIG_MTDMAP "mxc_nand.0" 129 #define MTDIDS_DEFAULT "nand0=" CONFIG_MTDMAP 130 #define MTDPARTS_DEFAULT "mtdparts=" CONFIG_MTDMAP \ 131 ":1M(u-boot)ro," \ 132 "512K(env)," \ 133 "512K(env2)," \ 134 "512K(firmware)," \ 135 "512K(dtb)," \ 136 "5M(kernel)," \ 137 "-(rootfs)" 138 139 /* 140 * U-Boot general configurations 141 */ 142 #define CONFIG_SYS_LONGHELP 143 #define CONFIG_SYS_CBSIZE 2048 /* console I/O buffer */ 144 #define CONFIG_SYS_PBSIZE \ 145 (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) 146 /* Print buffer size */ 147 #define CONFIG_SYS_MAXARGS 16 /* max command args */ 148 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 149 /* Boot argument buffer size */ 150 #define CONFIG_AUTO_COMPLETE 151 #define CONFIG_CMDLINE_EDITING 152 #define CONFIG_SYS_HUSH_PARSER /* enable the "hush" shell */ 153 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " /* secondary prompt string */ 154 #define CONFIG_ENV_VARS_UBOOT_CONFIG 155 #define CONFIG_PREBOOT "run check_flash check_env;" 156 157 158 /* 159 * Boot Linux 160 */ 161 #define CONFIG_CMDLINE_TAG /* send commandline to Kernel */ 162 #define CONFIG_SETUP_MEMORY_TAGS /* send memory definition to kernel */ 163 #define CONFIG_INITRD_TAG /* send initrd params */ 164 165 #define CONFIG_OF_LIBFDT 166 167 #define CONFIG_BOOTDELAY 5 168 #define CONFIG_ZERO_BOOTDELAY_CHECK 169 #define CONFIG_BOOTFILE __stringify(CONFIG_BOARD_NAME) "-linux.bin" 170 #define CONFIG_BOOTARGS "console=" __stringify(ACFG_CONSOLE_DEV) "," \ 171 __stringify(CONFIG_BAUDRATE) " " MTDPARTS_DEFAULT \ 172 " ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs " 173 174 #define ACFG_CONSOLE_DEV ttySMX0 175 #define CONFIG_BOOTCOMMAND "run ubifsboot" 176 #define CONFIG_SYS_AUTOLOAD "no" 177 /* 178 * Default load address for user programs and kernel 179 */ 180 #define CONFIG_LOADADDR 0xA0000000 181 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 182 183 /* 184 * Extra Environments 185 */ 186 #define CONFIG_EXTRA_ENV_SETTINGS \ 187 "env_version=" __stringify(CONFIG_ENV_VERSION) "\0" \ 188 "consoledev=" __stringify(ACFG_CONSOLE_DEV) "\0" \ 189 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 190 "partition=nand0,6\0" \ 191 "u-boot_addr=" __stringify(ACFG_MONITOR_OFFSET) "\0" \ 192 "env_addr=" __stringify(CONFIG_ENV_OFFSET) "\0" \ 193 "firmware_addr=" __stringify(CONFIG_FIRMWARE_OFFSET) "\0" \ 194 "firmware_size=" __stringify(CONFIG_FIRMWARE_SIZE) "\0" \ 195 "kernel_addr=" __stringify(CONFIG_KERNEL_OFFSET) "\0" \ 196 "rootfs_addr=" __stringify(CONFIG_ROOTFS_OFFSET) "\0" \ 197 "board_name=" __stringify(CONFIG_BOARD_NAME) "\0" \ 198 "kernel_addr_r=A0000000\0" \ 199 "check_env=if test -n ${flash_env_version}; " \ 200 "then env default env_version; " \ 201 "else env set flash_env_version ${env_version}; env save; "\ 202 "fi; " \ 203 "if itest ${flash_env_version} < ${env_version}; then " \ 204 "echo \"*** Warning - Environment version" \ 205 " change suggests: run flash_reset_env; reset\"; "\ 206 "env default flash_reset_env; "\ 207 "fi; \0" \ 208 "check_flash=nand lock; nand unlock ${env_addr}; \0" \ 209 "flash_reset_env=env default -f -a; saveenv; run update_env;" \ 210 "echo Flash environment variables erased!\0" \ 211 "download_uboot=tftpboot ${loadaddr} ${board_name}" \ 212 "-u-boot-with-spl.bin\0" \ 213 "flash_uboot=nand unlock ${u-boot_addr} ;" \ 214 "nand erase.part u-boot;" \ 215 "if nand write.trimffs ${fileaddr} ${u-boot_addr} ${filesize};"\ 216 "then nand lock; nand unlock ${env_addr};" \ 217 "echo Flashing of uboot succeed;" \ 218 "else echo Flashing of uboot failed;" \ 219 "fi; \0" \ 220 "update_uboot=run download_uboot flash_uboot\0" \ 221 "download_env=tftpboot ${loadaddr} ${board_name}" \ 222 "-u-boot-env.txt\0" \ 223 "flash_env=env import -t ${loadaddr}; env save; \0" \ 224 "update_env=run download_env flash_env\0" \ 225 "update_all=run update_env update_uboot\0" \ 226 "unlock_regs=mw 10000008 0; mw 10020008 0\0" \ 227 228 /* 229 * Serial Driver 230 */ 231 #define CONFIG_MXC_UART 232 #define CONFIG_CONS_INDEX 1 233 #define CONFIG_BAUDRATE 115200 234 #define CONFIG_MXC_UART_BASE UART1_BASE 235 236 /* 237 * GPIO 238 */ 239 #define CONFIG_MXC_GPIO 240 241 /* 242 * NOR 243 */ 244 245 /* 246 * NAND 247 */ 248 #define CONFIG_NAND_MXC 249 250 #define CONFIG_MXC_NAND_REGS_BASE 0xD8000000 251 #define CONFIG_SYS_NAND_BASE CONFIG_MXC_NAND_REGS_BASE 252 #define CONFIG_SYS_MAX_NAND_DEVICE 1 253 254 #define CONFIG_MXC_NAND_HWECC 255 #define CONFIG_SYS_NAND_LARGEPAGE 256 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 257 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 258 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) 259 #define CONFIG_SYS_NAND_PAGE_COUNT CONFIG_SYS_NAND_BLOCK_SIZE / \ 260 CONFIG_SYS_NAND_PAGE_SIZE 261 #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024) 262 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 11 263 #define NAND_MAX_CHIPS 1 264 265 #define CONFIG_FLASH_SHOW_PROGRESS 45 266 #define CONFIG_SYS_NAND_QUIET 1 267 268 /* 269 * Partitions & Filsystems 270 */ 271 #define CONFIG_MTD_DEVICE 272 #define CONFIG_MTD_PARTITIONS 273 #define CONFIG_DOS_PARTITION 274 #define CONFIG_SUPPORT_VFAT 275 276 /* 277 * UBIFS 278 */ 279 #define CONFIG_RBTREE 280 #define CONFIG_LZO 281 282 /* 283 * Ethernet (on SOC imx FEC) 284 */ 285 #define CONFIG_FEC_MXC 286 #define CONFIG_FEC_MXC_PHYADDR 0x1f 287 #define CONFIG_MII /* MII PHY management */ 288 289 /* 290 * FPGA 291 */ 292 #ifndef CONFIG_SPL_BUILD 293 #define CONFIG_FPGA 294 #endif 295 #define CONFIG_FPGA_COUNT 1 296 #define CONFIG_FPGA_XILINX 297 #define CONFIG_FPGA_SPARTAN3 298 #define CONFIG_SYS_FPGA_WAIT 250 /* 250 ms */ 299 #define CONFIG_SYS_FPGA_PROG_FEEDBACK 300 #define CONFIG_SYS_FPGA_CHECK_CTRLC 301 #define CONFIG_SYS_FPGA_CHECK_ERROR 302 303 /* 304 * Fuses - IIM 305 */ 306 #ifdef CONFIG_CMD_IMX_FUSE 307 #define IIM_MAC_BANK 0 308 #define IIM_MAC_ROW 5 309 #define IIM0_SCC_KEY 11 310 #define IIM1_SUID 1 311 #endif 312 313 /* 314 * I2C 315 */ 316 317 #ifdef CONFIG_CMD_I2C 318 #define CONFIG_SYS_I2C 319 #define CONFIG_SYS_I2C_MXC 320 #define CONFIG_SYS_MXC_I2C1_SPEED 100000 /* 100 kHz */ 321 #define CONFIG_SYS_MXC_I2C1_SLAVE 0x7F 322 #define CONFIG_SYS_MXC_I2C2_SPEED 100000 /* 100 kHz */ 323 #define CONFIG_SYS_MXC_I2C2_SLAVE 0x7F 324 #define CONFIG_SYS_I2C_NOPROBES { } 325 326 #ifdef CONFIG_CMD_EEPROM 327 # define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM 24LC02 */ 328 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */ 329 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 330 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* msec */ 331 #endif /* CONFIG_CMD_EEPROM */ 332 #endif /* CONFIG_CMD_I2C */ 333 334 /* 335 * SD/MMC 336 */ 337 #ifdef CONFIG_CMD_MMC 338 #define CONFIG_MMC 339 #define CONFIG_GENERIC_MMC 340 #define CONFIG_MXC_MMC 341 #define CONFIG_MXC_MCI_REGS_BASE 0x10014000 342 #endif 343 344 /* 345 * RTC 346 */ 347 #ifdef CONFIG_CMD_DATE 348 #define CONFIG_RTC_DS1374 349 #define CONFIG_SYS_RTC_BUS_NUM 0 350 #endif /* CONFIG_CMD_DATE */ 351 352 /* 353 * PLL 354 * 355 * 31 | x |x| x x x x |x x x x x x x x x x |x x|x x x x|x x x x x x x x x x| 0 356 * |CPLM|X|----PD---|--------MFD---------|XXX|--MFI--|-----MFN-----------| 357 */ 358 #define CONFIG_MX27_CLK32 32768 /* 32768 or 32000 Hz crystal */ 359 360 #if (ACFG_SDRAM_MBYTE_SYZE == 64) /* micron MT46H16M32LF -6 */ 361 /* micron 64MB */ 362 #define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ 363 #define PHYS_SDRAM_2_SIZE 0x04000000 /* 64 MB */ 364 #endif 365 366 #if (ACFG_SDRAM_MBYTE_SYZE == 128) 367 /* micron 128MB */ 368 #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */ 369 #define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */ 370 #endif 371 372 #if (ACFG_SDRAM_MBYTE_SYZE == 256) 373 /* micron 256MB */ 374 #define PHYS_SDRAM_1_SIZE 0x10000000 /* 256 MB */ 375 #define PHYS_SDRAM_2_SIZE 0x10000000 /* 256 MB */ 376 #endif 377 378 #endif /* __CONFIG_H */ 379