xref: /openbmc/u-boot/include/configs/apf27.h (revision 679590eb)
1 /*
2  *
3  * Configuration settings for the Armadeus Project motherboard APF27
4  *
5  * Copyright (C) 2008-2013 Eric Jarrige <eric.jarrige@armadeus.org>
6  *
7  * SPDX-License-Identifier:    GPL-2.0+
8  */
9 
10 #ifndef __CONFIG_H
11 #define __CONFIG_H
12 
13 #define CONFIG_ENV_VERSION	10
14 #define CONFIG_BOARD_NAME apf27
15 
16 /*
17  * SoC configurations
18  */
19 #define CONFIG_MX27			/* This is a Freescale i.MX27 Chip */
20 #define CONFIG_MACH_TYPE	1698	/* APF27 */
21 
22 /*
23  * Enable the call to miscellaneous platform dependent initialization.
24  */
25 
26 /*
27  * SPL
28  */
29 #define CONFIG_SPL_TARGET	"u-boot-with-spl.bin"
30 #define CONFIG_SPL_LDSCRIPT	"arch/$(ARCH)/cpu/u-boot-spl.lds"
31 #define CONFIG_SPL_MAX_SIZE	2048
32 #define CONFIG_SPL_TEXT_BASE    0xA0000000
33 
34 /* NAND boot config */
35 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
36 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x800
37 #define CONFIG_SYS_NAND_U_BOOT_DST	CONFIG_SYS_TEXT_BASE
38 #define CONFIG_SYS_NAND_U_BOOT_SIZE	CONFIG_SYS_MONITOR_LEN - 0x800
39 
40 /*
41  * BOOTP options
42  */
43 #define CONFIG_BOOTP_SUBNETMASK
44 #define CONFIG_BOOTP_GATEWAY
45 #define CONFIG_BOOTP_HOSTNAME
46 #define CONFIG_BOOTP_BOOTPATH
47 #define CONFIG_BOOTP_BOOTFILESIZE
48 #define CONFIG_BOOTP_DNS
49 #define CONFIG_BOOTP_DNS2
50 
51 #define CONFIG_HOSTNAME	CONFIG_BOARD_NAME
52 #define CONFIG_ROOTPATH	"/tftpboot/" __stringify(CONFIG_BOARD_NAME) "-root"
53 
54 /*
55  * Memory configurations
56  */
57 #define CONFIG_NR_DRAM_POPULATED 1
58 #define CONFIG_NR_DRAM_BANKS	2
59 
60 #define ACFG_SDRAM_MBYTE_SYZE 64
61 
62 #define PHYS_SDRAM_1			0xA0000000
63 #define PHYS_SDRAM_2			0xB0000000
64 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
65 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (512<<10))
66 #define CONFIG_SYS_MEMTEST_START	0xA0000000	/* memtest test area  */
67 #define CONFIG_SYS_MEMTEST_END		0xA0300000	/* 3 MiB RAM test */
68 
69 #define CONFIG_SYS_INIT_SP_ADDR	(CONFIG_SYS_SDRAM_BASE	\
70 		+ PHYS_SDRAM_1_SIZE - 0x0100000)
71 
72 #define CONFIG_SYS_TEXT_BASE		0xA0000800
73 
74 /*
75  * FLASH organization
76  */
77 #define	ACFG_MONITOR_OFFSET		0x00000000
78 #define	CONFIG_SYS_MONITOR_LEN		0x00100000	/* 1MiB */
79 #define	CONFIG_ENV_OVERWRITE
80 #define	CONFIG_ENV_OFFSET		0x00100000	/* NAND offset */
81 #define	CONFIG_ENV_SIZE			0x00020000	/* 128kB  */
82 #define CONFIG_ENV_RANGE		0X00080000	/* 512kB */
83 #define	CONFIG_ENV_OFFSET_REDUND	\
84 		(CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)	/* +512kB */
85 #define	CONFIG_ENV_SIZE_REDUND		CONFIG_ENV_SIZE	/* 512kB */
86 #define	CONFIG_FIRMWARE_OFFSET		0x00200000
87 #define	CONFIG_FIRMWARE_SIZE		0x00080000	/* 512kB  */
88 #define	CONFIG_KERNEL_OFFSET		0x00300000
89 #define	CONFIG_ROOTFS_OFFSET		0x00800000
90 
91 #define CONFIG_MTDMAP			"mxc_nand.0"
92 #define MTDIDS_DEFAULT			"nand0=" CONFIG_MTDMAP
93 #define MTDPARTS_DEFAULT	"mtdparts=" CONFIG_MTDMAP \
94 				":1M(u-boot)ro," \
95 				"512K(env)," \
96 				"512K(env2)," \
97 				"512K(firmware)," \
98 				"512K(dtb)," \
99 				"5M(kernel)," \
100 				"-(rootfs)"
101 
102 /*
103  * U-Boot general configurations
104  */
105 #define CONFIG_SYS_LONGHELP
106 #define CONFIG_SYS_CBSIZE		2048		/* console I/O buffer */
107 #define CONFIG_SYS_PBSIZE		\
108 				(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
109 						/* Print buffer size */
110 #define CONFIG_SYS_MAXARGS		16		/* max command args */
111 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
112 						/* Boot argument buffer size */
113 #define CONFIG_AUTO_COMPLETE
114 #define CONFIG_CMDLINE_EDITING
115 #define CONFIG_ENV_VARS_UBOOT_CONFIG
116 #define CONFIG_PREBOOT			"run check_flash check_env;"
117 
118 /*
119  * Boot Linux
120  */
121 #define CONFIG_CMDLINE_TAG		/* send commandline to Kernel	*/
122 #define CONFIG_SETUP_MEMORY_TAGS	/* send memory definition to kernel */
123 #define CONFIG_INITRD_TAG		/* send initrd params	*/
124 
125 #define	CONFIG_BOOTFILE		__stringify(CONFIG_BOARD_NAME) "-linux.bin"
126 #define CONFIG_BOOTARGS		"console=" __stringify(ACFG_CONSOLE_DEV) "," \
127 			__stringify(CONFIG_BAUDRATE) " " MTDPARTS_DEFAULT \
128 			" ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs "
129 
130 #define ACFG_CONSOLE_DEV	ttySMX0
131 #define CONFIG_BOOTCOMMAND	"run ubifsboot"
132 #define CONFIG_SYS_AUTOLOAD	"no"
133 /*
134  * Default load address for user programs and kernel
135  */
136 #define CONFIG_LOADADDR			0xA0000000
137 #define	CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
138 
139 /*
140  * Extra Environments
141  */
142 #define CONFIG_EXTRA_ENV_SETTINGS \
143 	"env_version="		__stringify(CONFIG_ENV_VERSION)		"\0" \
144 	"consoledev="		__stringify(ACFG_CONSOLE_DEV)		"\0" \
145 	"mtdparts="		MTDPARTS_DEFAULT			"\0" \
146 	"partition=nand0,6\0"						\
147 	"u-boot_addr="		__stringify(ACFG_MONITOR_OFFSET)	"\0" \
148 	"env_addr="		__stringify(CONFIG_ENV_OFFSET)		"\0" \
149 	"firmware_addr="	__stringify(CONFIG_FIRMWARE_OFFSET)	"\0" \
150 	"firmware_size="	__stringify(CONFIG_FIRMWARE_SIZE)	"\0" \
151 	"kernel_addr="		__stringify(CONFIG_KERNEL_OFFSET)	"\0" \
152 	"rootfs_addr="		__stringify(CONFIG_ROOTFS_OFFSET)	"\0" \
153 	"board_name="		__stringify(CONFIG_BOARD_NAME)		"\0" \
154 	"kernel_addr_r=A0000000\0" \
155 	"check_env=if test -n ${flash_env_version}; "			\
156 		"then env default env_version; "			\
157 		"else env set flash_env_version ${env_version}; env save; "\
158 		"fi; "							\
159 		"if itest ${flash_env_version} < ${env_version}; then " \
160 			"echo \"*** Warning - Environment version"	\
161 			" change suggests: run flash_reset_env; reset\"; "\
162 			"env default flash_reset_env; "\
163 		"fi; \0"						\
164 	"check_flash=nand lock; nand unlock ${env_addr}; \0"	\
165 	"flash_reset_env=env default -f -a; saveenv; run update_env;"	\
166 		"echo Flash environment variables erased!\0"		\
167 	"download_uboot=tftpboot ${loadaddr} ${board_name}"		\
168 		"-u-boot-with-spl.bin\0"				\
169 	"flash_uboot=nand unlock ${u-boot_addr} ;"			\
170 		"nand erase.part u-boot;"		\
171 		"if nand write.trimffs ${fileaddr} ${u-boot_addr} ${filesize};"\
172 			"then nand lock; nand unlock ${env_addr};"	\
173 				"echo Flashing of uboot succeed;"	\
174 			"else echo Flashing of uboot failed;"		\
175 		"fi; \0"						\
176 	"update_uboot=run download_uboot flash_uboot\0"			\
177 	"download_env=tftpboot ${loadaddr} ${board_name}"		\
178 		"-u-boot-env.txt\0"				\
179 	"flash_env=env import -t ${loadaddr}; env save; \0"		\
180 	"update_env=run download_env flash_env\0"			\
181 	"update_all=run update_env update_uboot\0"			\
182 	"unlock_regs=mw 10000008 0; mw 10020008 0\0"			\
183 
184 /*
185  * Serial Driver
186  */
187 #define CONFIG_MXC_UART
188 #define CONFIG_CONS_INDEX		1
189 #define CONFIG_MXC_UART_BASE		UART1_BASE
190 
191 /*
192  * GPIO
193  */
194 #define CONFIG_MXC_GPIO
195 
196 /*
197  * NOR
198  */
199 
200 /*
201  * NAND
202  */
203 #define CONFIG_NAND_MXC
204 
205 #define CONFIG_MXC_NAND_REGS_BASE	0xD8000000
206 #define CONFIG_SYS_NAND_BASE		CONFIG_MXC_NAND_REGS_BASE
207 #define CONFIG_SYS_MAX_NAND_DEVICE	1
208 
209 #define CONFIG_MXC_NAND_HWECC
210 #define CONFIG_SYS_NAND_LARGEPAGE
211 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
212 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
213 #define CONFIG_SYS_NAND_BLOCK_SIZE	(128 * 1024)
214 #define CONFIG_SYS_NAND_PAGE_COUNT	CONFIG_SYS_NAND_BLOCK_SIZE / \
215 						CONFIG_SYS_NAND_PAGE_SIZE
216 #define CONFIG_SYS_NAND_SIZE		(256 * 1024 * 1024)
217 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	11
218 #define NAND_MAX_CHIPS			1
219 
220 #define CONFIG_FLASH_SHOW_PROGRESS	45
221 #define CONFIG_SYS_NAND_QUIET		1
222 
223 /*
224  * Partitions & Filsystems
225  */
226 #define CONFIG_MTD_DEVICE
227 #define CONFIG_MTD_PARTITIONS
228 #define CONFIG_SUPPORT_VFAT
229 
230 /*
231  * Ethernet (on SOC imx FEC)
232  */
233 #define CONFIG_FEC_MXC
234 #define CONFIG_FEC_MXC_PHYADDR		0x1f
235 #define CONFIG_MII				/* MII PHY management	*/
236 
237 /*
238  * FPGA
239  */
240 #ifndef CONFIG_SPL_BUILD
241 #define CONFIG_FPGA
242 #endif
243 #define CONFIG_FPGA_COUNT		1
244 #define CONFIG_FPGA_XILINX
245 #define CONFIG_FPGA_SPARTAN3
246 #define CONFIG_SYS_FPGA_WAIT		250 /* 250 ms */
247 #define CONFIG_SYS_FPGA_PROG_FEEDBACK
248 #define CONFIG_SYS_FPGA_CHECK_CTRLC
249 #define CONFIG_SYS_FPGA_CHECK_ERROR
250 
251 /*
252  * Fuses - IIM
253  */
254 #ifdef CONFIG_CMD_IMX_FUSE
255 #define IIM_MAC_BANK		0
256 #define IIM_MAC_ROW		5
257 #define IIM0_SCC_KEY		11
258 #define IIM1_SUID		1
259 #endif
260 
261 /*
262  * I2C
263  */
264 
265 #ifdef CONFIG_CMD_I2C
266 #define CONFIG_SYS_I2C
267 #define CONFIG_SYS_I2C_MXC
268 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
269 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
270 #define CONFIG_SYS_MXC_I2C1_SPEED	100000	/* 100 kHz */
271 #define CONFIG_SYS_MXC_I2C1_SLAVE	0x7F
272 #define CONFIG_SYS_MXC_I2C2_SPEED	100000	/* 100 kHz */
273 #define CONFIG_SYS_MXC_I2C2_SLAVE	0x7F
274 #define CONFIG_SYS_I2C_NOPROBES		{ }
275 
276 #ifdef CONFIG_CMD_EEPROM
277 # define CONFIG_SYS_I2C_EEPROM_ADDR	0x50	/* EEPROM 24LC02 */
278 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1	/* bytes of address */
279 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	3
280 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	10	/* msec */
281 #endif /* CONFIG_CMD_EEPROM */
282 #endif /* CONFIG_CMD_I2C */
283 
284 /*
285  * SD/MMC
286  */
287 #ifdef CONFIG_CMD_MMC
288 #define CONFIG_MXC_MCI_REGS_BASE	0x10014000
289 #endif
290 
291 /*
292  * RTC
293  */
294 #ifdef CONFIG_CMD_DATE
295 #define CONFIG_RTC_DS1374
296 #define CONFIG_SYS_RTC_BUS_NUM		0
297 #endif /* CONFIG_CMD_DATE */
298 
299 /*
300  * PLL
301  *
302  *  31 | x  |x| x x x x |x x x x x x x x x x |x x|x x x x|x x x x x x x x x x| 0
303  *     |CPLM|X|----PD---|--------MFD---------|XXX|--MFI--|-----MFN-----------|
304  */
305 #define CONFIG_MX27_CLK32		32768	/* 32768 or 32000 Hz crystal */
306 
307 #if (ACFG_SDRAM_MBYTE_SYZE == 64) /* micron MT46H16M32LF -6 */
308 /* micron 64MB */
309 #define PHYS_SDRAM_1_SIZE			0x04000000 /* 64 MB */
310 #define PHYS_SDRAM_2_SIZE			0x04000000 /* 64 MB */
311 #endif
312 
313 #if (ACFG_SDRAM_MBYTE_SYZE == 128)
314 /* micron 128MB */
315 #define PHYS_SDRAM_1_SIZE			0x08000000 /* 128 MB */
316 #define PHYS_SDRAM_2_SIZE			0x08000000 /* 128 MB */
317 #endif
318 
319 #if (ACFG_SDRAM_MBYTE_SYZE == 256)
320 /* micron 256MB */
321 #define PHYS_SDRAM_1_SIZE			0x10000000 /* 256 MB */
322 #define PHYS_SDRAM_2_SIZE			0x10000000 /* 256 MB */
323 #endif
324 
325 #endif /* __CONFIG_H */
326