1 /* 2 * 3 * Configuration settings for the Armadeus Project motherboard APF27 4 * 5 * Copyright (C) 2008-2013 Eric Jarrige <eric.jarrige@armadeus.org> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __CONFIG_H 11 #define __CONFIG_H 12 13 #define CONFIG_VERSION_VARIABLE 14 #define CONFIG_ENV_VERSION 10 15 #define CONFIG_IDENT_STRING " apf27 patch 3.10" 16 #define CONFIG_BOARD_NAME apf27 17 18 /* 19 * SoC configurations 20 */ 21 #define CONFIG_MX27 /* This is a Freescale i.MX27 Chip */ 22 #define CONFIG_MACH_TYPE 1698 /* APF27 */ 23 #define CONFIG_SYS_GENERIC_BOARD 24 25 /* 26 * Enable the call to miscellaneous platform dependent initialization. 27 */ 28 #define CONFIG_SYS_NO_FLASH 29 30 /* 31 * Board display option 32 */ 33 #define CONFIG_DISPLAY_BOARDINFO 34 #define CONFIG_DISPLAY_CPUINFO 35 36 /* 37 * SPL 38 */ 39 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" 40 #define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds" 41 #define CONFIG_SPL_MAX_SIZE 2048 42 #define CONFIG_SPL_TEXT_BASE 0xA0000000 43 #define CONFIG_SPL_SERIAL_SUPPORT 44 45 /* NAND boot config */ 46 #define CONFIG_SPL_NAND_SUPPORT 47 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 48 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x800 49 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE 50 #define CONFIG_SYS_NAND_U_BOOT_SIZE CONFIG_SYS_MONITOR_LEN - 0x800 51 52 /* 53 * BOOTP options 54 */ 55 #define CONFIG_BOOTP_SUBNETMASK 56 #define CONFIG_BOOTP_GATEWAY 57 #define CONFIG_BOOTP_HOSTNAME 58 #define CONFIG_BOOTP_BOOTPATH 59 #define CONFIG_BOOTP_BOOTFILESIZE 60 #define CONFIG_BOOTP_DNS 61 #define CONFIG_BOOTP_DNS2 62 63 #define CONFIG_HOSTNAME CONFIG_BOARD_NAME 64 #define CONFIG_ROOTPATH "/tftpboot/" __stringify(CONFIG_BOARD_NAME) "-root" 65 66 /* 67 * U-Boot Commands 68 */ 69 #define CONFIG_CMD_ASKENV /* ask for env variable */ 70 #define CONFIG_CMD_BSP /* Board Specific functions */ 71 #define CONFIG_CMD_CACHE /* icache, dcache */ 72 #define CONFIG_CMD_DATE 73 #define CONFIG_CMD_DHCP /* DHCP Support */ 74 #define CONFIG_CMD_DNS 75 #define CONFIG_CMD_EEPROM 76 #define CONFIG_CMD_EXT2 77 #define CONFIG_CMD_FAT /* FAT support */ 78 #define CONFIG_CMD_IMX_FUSE /* imx iim fuse */ 79 #define CONFIG_CMD_I2C 80 #define CONFIG_CMD_MII /* MII support */ 81 #define CONFIG_CMD_MMC 82 #define CONFIG_CMD_MTDPARTS /* MTD partition support */ 83 #define CONFIG_CMD_NAND /* NAND support */ 84 #define CONFIG_CMD_NAND_LOCK_UNLOCK 85 #define CONFIG_CMD_NAND_TRIMFFS 86 #define CONFIG_CMD_PING /* ping support */ 87 #define CONFIG_CMD_UBI 88 #define CONFIG_CMD_UBIFS 89 90 /* 91 * Memory configurations 92 */ 93 #define CONFIG_NR_DRAM_POPULATED 1 94 #define CONFIG_NR_DRAM_BANKS 2 95 96 #define ACFG_SDRAM_MBYTE_SYZE 64 97 98 #define PHYS_SDRAM_1 0xA0000000 99 #define PHYS_SDRAM_2 0xB0000000 100 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 101 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (512<<10)) 102 #define CONFIG_SYS_MEMTEST_START 0xA0000000 /* memtest test area */ 103 #define CONFIG_SYS_MEMTEST_END 0xA0300000 /* 3 MiB RAM test */ 104 105 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE \ 106 + PHYS_SDRAM_1_SIZE - 0x0100000) 107 108 #define CONFIG_SYS_TEXT_BASE 0xA0000800 109 110 /* 111 * FLASH organization 112 */ 113 #define ACFG_MONITOR_OFFSET 0x00000000 114 #define CONFIG_SYS_MONITOR_LEN 0x00100000 /* 1MiB */ 115 #define CONFIG_ENV_IS_IN_NAND 116 #define CONFIG_ENV_OVERWRITE 117 #define CONFIG_ENV_OFFSET 0x00100000 /* NAND offset */ 118 #define CONFIG_ENV_SIZE 0x00020000 /* 128kB */ 119 #define CONFIG_ENV_RANGE 0X00080000 /* 512kB */ 120 #define CONFIG_ENV_OFFSET_REDUND \ 121 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) /* +512kB */ 122 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE /* 512kB */ 123 #define CONFIG_FIRMWARE_OFFSET 0x00200000 124 #define CONFIG_FIRMWARE_SIZE 0x00080000 /* 512kB */ 125 #define CONFIG_KERNEL_OFFSET 0x00300000 126 #define CONFIG_ROOTFS_OFFSET 0x00800000 127 128 #define CONFIG_MTDMAP "mxc_nand.0" 129 #define MTDIDS_DEFAULT "nand0=" CONFIG_MTDMAP 130 #define MTDPARTS_DEFAULT "mtdparts=" CONFIG_MTDMAP \ 131 ":1M(u-boot)ro," \ 132 "512K(env)," \ 133 "512K(env2)," \ 134 "512K(firmware)," \ 135 "512K(dtb)," \ 136 "5M(kernel)," \ 137 "-(rootfs)" 138 139 /* 140 * U-Boot general configurations 141 */ 142 #define CONFIG_SYS_LONGHELP 143 #define CONFIG_SYS_PROMPT "BIOS> " /* prompt string */ 144 #define CONFIG_SYS_CBSIZE 2048 /* console I/O buffer */ 145 #define CONFIG_SYS_PBSIZE \ 146 (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) 147 /* Print buffer size */ 148 #define CONFIG_SYS_MAXARGS 16 /* max command args */ 149 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 150 /* Boot argument buffer size */ 151 #define CONFIG_AUTO_COMPLETE 152 #define CONFIG_CMDLINE_EDITING 153 #define CONFIG_SYS_HUSH_PARSER /* enable the "hush" shell */ 154 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " /* secondary prompt string */ 155 #define CONFIG_ENV_VARS_UBOOT_CONFIG 156 #define CONFIG_PREBOOT "run check_flash check_env;" 157 158 159 /* 160 * Boot Linux 161 */ 162 #define CONFIG_CMDLINE_TAG /* send commandline to Kernel */ 163 #define CONFIG_SETUP_MEMORY_TAGS /* send memory definition to kernel */ 164 #define CONFIG_INITRD_TAG /* send initrd params */ 165 166 #define CONFIG_OF_LIBFDT 167 168 #define CONFIG_BOOTDELAY 5 169 #define CONFIG_ZERO_BOOTDELAY_CHECK 170 #define CONFIG_BOOTFILE __stringify(CONFIG_BOARD_NAME) "-linux.bin" 171 #define CONFIG_BOOTARGS "console=" __stringify(ACFG_CONSOLE_DEV) "," \ 172 __stringify(CONFIG_BAUDRATE) " " MTDPARTS_DEFAULT \ 173 " ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs " 174 175 #define ACFG_CONSOLE_DEV ttySMX0 176 #define CONFIG_BOOTCOMMAND "run ubifsboot" 177 #define CONFIG_SYS_AUTOLOAD "no" 178 /* 179 * Default load address for user programs and kernel 180 */ 181 #define CONFIG_LOADADDR 0xA0000000 182 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 183 184 /* 185 * Extra Environments 186 */ 187 #define CONFIG_EXTRA_ENV_SETTINGS \ 188 "env_version=" __stringify(CONFIG_ENV_VERSION) "\0" \ 189 "consoledev=" __stringify(ACFG_CONSOLE_DEV) "\0" \ 190 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 191 "partition=nand0,6\0" \ 192 "u-boot_addr=" __stringify(ACFG_MONITOR_OFFSET) "\0" \ 193 "env_addr=" __stringify(CONFIG_ENV_OFFSET) "\0" \ 194 "firmware_addr=" __stringify(CONFIG_FIRMWARE_OFFSET) "\0" \ 195 "firmware_size=" __stringify(CONFIG_FIRMWARE_SIZE) "\0" \ 196 "kernel_addr=" __stringify(CONFIG_KERNEL_OFFSET) "\0" \ 197 "rootfs_addr=" __stringify(CONFIG_ROOTFS_OFFSET) "\0" \ 198 "board_name=" __stringify(CONFIG_BOARD_NAME) "\0" \ 199 "kernel_addr_r=A0000000\0" \ 200 "check_env=if test -n ${flash_env_version}; " \ 201 "then env default env_version; " \ 202 "else env set flash_env_version ${env_version}; env save; "\ 203 "fi; " \ 204 "if itest ${flash_env_version} < ${env_version}; then " \ 205 "echo \"*** Warning - Environment version" \ 206 " change suggests: run flash_reset_env; reset\"; "\ 207 "env default flash_reset_env; "\ 208 "fi; \0" \ 209 "check_flash=nand lock; nand unlock ${env_addr}; \0" \ 210 "flash_reset_env=env default -f -a; saveenv; run update_env;" \ 211 "echo Flash environment variables erased!\0" \ 212 "download_uboot=tftpboot ${loadaddr} ${board_name}" \ 213 "-u-boot-with-spl.bin\0" \ 214 "flash_uboot=nand unlock ${u-boot_addr} ;" \ 215 "nand erase.part u-boot;" \ 216 "if nand write.trimffs ${fileaddr} ${u-boot_addr} ${filesize};"\ 217 "then nand lock; nand unlock ${env_addr};" \ 218 "echo Flashing of uboot succeed;" \ 219 "else echo Flashing of uboot failed;" \ 220 "fi; \0" \ 221 "update_uboot=run download_uboot flash_uboot\0" \ 222 "download_env=tftpboot ${loadaddr} ${board_name}" \ 223 "-u-boot-env.txt\0" \ 224 "flash_env=env import -t ${loadaddr}; env save; \0" \ 225 "update_env=run download_env flash_env\0" \ 226 "update_all=run update_env update_uboot\0" \ 227 "unlock_regs=mw 10000008 0; mw 10020008 0\0" \ 228 229 /* 230 * Serial Driver 231 */ 232 #define CONFIG_MXC_UART 233 #define CONFIG_CONS_INDEX 1 234 #define CONFIG_BAUDRATE 115200 235 #define CONFIG_MXC_UART_BASE UART1_BASE 236 237 /* 238 * GPIO 239 */ 240 #define CONFIG_MXC_GPIO 241 242 /* 243 * NOR 244 */ 245 246 /* 247 * NAND 248 */ 249 #define CONFIG_NAND_MXC 250 251 #define CONFIG_MXC_NAND_REGS_BASE 0xD8000000 252 #define CONFIG_SYS_NAND_BASE CONFIG_MXC_NAND_REGS_BASE 253 #define CONFIG_SYS_MAX_NAND_DEVICE 1 254 255 #define CONFIG_MXC_NAND_HWECC 256 #define CONFIG_SYS_NAND_LARGEPAGE 257 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 258 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 259 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) 260 #define CONFIG_SYS_NAND_PAGE_COUNT CONFIG_SYS_NAND_BLOCK_SIZE / \ 261 CONFIG_SYS_NAND_PAGE_SIZE 262 #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024) 263 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 11 264 #define NAND_MAX_CHIPS 1 265 266 #define CONFIG_FLASH_SHOW_PROGRESS 45 267 #define CONFIG_SYS_NAND_QUIET 1 268 269 /* 270 * Partitions & Filsystems 271 */ 272 #define CONFIG_MTD_DEVICE 273 #define CONFIG_MTD_PARTITIONS 274 #define CONFIG_DOS_PARTITION 275 #define CONFIG_SUPPORT_VFAT 276 277 /* 278 * UBIFS 279 */ 280 #define CONFIG_RBTREE 281 #define CONFIG_LZO 282 283 /* 284 * Ethernet (on SOC imx FEC) 285 */ 286 #define CONFIG_FEC_MXC 287 #define CONFIG_FEC_MXC_PHYADDR 0x1f 288 #define CONFIG_MII /* MII PHY management */ 289 290 /* 291 * FPGA 292 */ 293 #ifndef CONFIG_SPL_BUILD 294 #define CONFIG_FPGA 295 #endif 296 #define CONFIG_FPGA_COUNT 1 297 #define CONFIG_FPGA_XILINX 298 #define CONFIG_FPGA_SPARTAN3 299 #define CONFIG_SYS_FPGA_WAIT 250 /* 250 ms */ 300 #define CONFIG_SYS_FPGA_PROG_FEEDBACK 301 #define CONFIG_SYS_FPGA_CHECK_CTRLC 302 #define CONFIG_SYS_FPGA_CHECK_ERROR 303 304 /* 305 * Fuses - IIM 306 */ 307 #ifdef CONFIG_CMD_IMX_FUSE 308 #define IIM_MAC_BANK 0 309 #define IIM_MAC_ROW 5 310 #define IIM0_SCC_KEY 11 311 #define IIM1_SUID 1 312 #endif 313 314 /* 315 * I2C 316 */ 317 318 #ifdef CONFIG_CMD_I2C 319 #define CONFIG_SYS_I2C 320 #define CONFIG_SYS_I2C_MXC 321 #define CONFIG_SYS_MXC_I2C1_SPEED 100000 /* 100 kHz */ 322 #define CONFIG_SYS_MXC_I2C1_SLAVE 0x7F 323 #define CONFIG_SYS_MXC_I2C2_SPEED 100000 /* 100 kHz */ 324 #define CONFIG_SYS_MXC_I2C2_SLAVE 0x7F 325 #define CONFIG_SYS_I2C_NOPROBES { } 326 327 #ifdef CONFIG_CMD_EEPROM 328 # define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM 24LC02 */ 329 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */ 330 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 331 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* msec */ 332 #endif /* CONFIG_CMD_EEPROM */ 333 #endif /* CONFIG_CMD_I2C */ 334 335 /* 336 * SD/MMC 337 */ 338 #ifdef CONFIG_CMD_MMC 339 #define CONFIG_MMC 340 #define CONFIG_GENERIC_MMC 341 #define CONFIG_MXC_MMC 342 #define CONFIG_MXC_MCI_REGS_BASE 0x10014000 343 #endif 344 345 /* 346 * RTC 347 */ 348 #ifdef CONFIG_CMD_DATE 349 #define CONFIG_RTC_DS1374 350 #define CONFIG_SYS_RTC_BUS_NUM 0 351 #endif /* CONFIG_CMD_DATE */ 352 353 /* 354 * PLL 355 * 356 * 31 | x |x| x x x x |x x x x x x x x x x |x x|x x x x|x x x x x x x x x x| 0 357 * |CPLM|X|----PD---|--------MFD---------|XXX|--MFI--|-----MFN-----------| 358 */ 359 #define CONFIG_MX27_CLK32 32768 /* 32768 or 32000 Hz crystal */ 360 361 #if (ACFG_SDRAM_MBYTE_SYZE == 64) /* micron MT46H16M32LF -6 */ 362 /* micron 64MB */ 363 #define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ 364 #define PHYS_SDRAM_2_SIZE 0x04000000 /* 64 MB */ 365 #endif 366 367 #if (ACFG_SDRAM_MBYTE_SYZE == 128) 368 /* micron 128MB */ 369 #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */ 370 #define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */ 371 #endif 372 373 #if (ACFG_SDRAM_MBYTE_SYZE == 256) 374 /* micron 256MB */ 375 #define PHYS_SDRAM_1_SIZE 0x10000000 /* 256 MB */ 376 #define PHYS_SDRAM_2_SIZE 0x10000000 /* 256 MB */ 377 #endif 378 379 #endif /* __CONFIG_H */ 380