1 /* 2 * 3 * Configuration settings for the Armadeus Project motherboard APF27 4 * 5 * Copyright (C) 2008-2013 Eric Jarrige <eric.jarrige@armadeus.org> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __CONFIG_H 11 #define __CONFIG_H 12 13 #define CONFIG_ENV_VERSION 10 14 #define CONFIG_BOARD_NAME apf27 15 16 /* 17 * SoC configurations 18 */ 19 #define CONFIG_MX27 /* This is a Freescale i.MX27 Chip */ 20 #define CONFIG_MACH_TYPE 1698 /* APF27 */ 21 22 /* 23 * Enable the call to miscellaneous platform dependent initialization. 24 */ 25 #define CONFIG_SYS_NO_FLASH 26 27 /* 28 * Board display option 29 */ 30 #define CONFIG_DISPLAY_BOARDINFO 31 #define CONFIG_DISPLAY_CPUINFO 32 33 /* 34 * SPL 35 */ 36 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" 37 #define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds" 38 #define CONFIG_SPL_MAX_SIZE 2048 39 #define CONFIG_SPL_TEXT_BASE 0xA0000000 40 41 /* NAND boot config */ 42 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 43 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x800 44 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE 45 #define CONFIG_SYS_NAND_U_BOOT_SIZE CONFIG_SYS_MONITOR_LEN - 0x800 46 47 /* 48 * BOOTP options 49 */ 50 #define CONFIG_BOOTP_SUBNETMASK 51 #define CONFIG_BOOTP_GATEWAY 52 #define CONFIG_BOOTP_HOSTNAME 53 #define CONFIG_BOOTP_BOOTPATH 54 #define CONFIG_BOOTP_BOOTFILESIZE 55 #define CONFIG_BOOTP_DNS 56 #define CONFIG_BOOTP_DNS2 57 58 #define CONFIG_HOSTNAME CONFIG_BOARD_NAME 59 #define CONFIG_ROOTPATH "/tftpboot/" __stringify(CONFIG_BOARD_NAME) "-root" 60 61 /* 62 * U-Boot Commands 63 */ 64 #define CONFIG_CMD_BSP /* Board Specific functions */ 65 #define CONFIG_CMD_DATE 66 #define CONFIG_CMD_EEPROM 67 #define CONFIG_CMD_IMX_FUSE /* imx iim fuse */ 68 #define CONFIG_CMD_MTDPARTS /* MTD partition support */ 69 #define CONFIG_CMD_NAND /* NAND support */ 70 #define CONFIG_CMD_NAND_LOCK_UNLOCK 71 #define CONFIG_CMD_NAND_TRIMFFS 72 #define CONFIG_CMD_UBI 73 #define CONFIG_CMD_UBIFS 74 75 /* 76 * Memory configurations 77 */ 78 #define CONFIG_NR_DRAM_POPULATED 1 79 #define CONFIG_NR_DRAM_BANKS 2 80 81 #define ACFG_SDRAM_MBYTE_SYZE 64 82 83 #define PHYS_SDRAM_1 0xA0000000 84 #define PHYS_SDRAM_2 0xB0000000 85 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 86 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (512<<10)) 87 #define CONFIG_SYS_MEMTEST_START 0xA0000000 /* memtest test area */ 88 #define CONFIG_SYS_MEMTEST_END 0xA0300000 /* 3 MiB RAM test */ 89 90 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE \ 91 + PHYS_SDRAM_1_SIZE - 0x0100000) 92 93 #define CONFIG_SYS_TEXT_BASE 0xA0000800 94 95 /* 96 * FLASH organization 97 */ 98 #define ACFG_MONITOR_OFFSET 0x00000000 99 #define CONFIG_SYS_MONITOR_LEN 0x00100000 /* 1MiB */ 100 #define CONFIG_ENV_IS_IN_NAND 101 #define CONFIG_ENV_OVERWRITE 102 #define CONFIG_ENV_OFFSET 0x00100000 /* NAND offset */ 103 #define CONFIG_ENV_SIZE 0x00020000 /* 128kB */ 104 #define CONFIG_ENV_RANGE 0X00080000 /* 512kB */ 105 #define CONFIG_ENV_OFFSET_REDUND \ 106 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) /* +512kB */ 107 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE /* 512kB */ 108 #define CONFIG_FIRMWARE_OFFSET 0x00200000 109 #define CONFIG_FIRMWARE_SIZE 0x00080000 /* 512kB */ 110 #define CONFIG_KERNEL_OFFSET 0x00300000 111 #define CONFIG_ROOTFS_OFFSET 0x00800000 112 113 #define CONFIG_MTDMAP "mxc_nand.0" 114 #define MTDIDS_DEFAULT "nand0=" CONFIG_MTDMAP 115 #define MTDPARTS_DEFAULT "mtdparts=" CONFIG_MTDMAP \ 116 ":1M(u-boot)ro," \ 117 "512K(env)," \ 118 "512K(env2)," \ 119 "512K(firmware)," \ 120 "512K(dtb)," \ 121 "5M(kernel)," \ 122 "-(rootfs)" 123 124 /* 125 * U-Boot general configurations 126 */ 127 #define CONFIG_SYS_LONGHELP 128 #define CONFIG_SYS_CBSIZE 2048 /* console I/O buffer */ 129 #define CONFIG_SYS_PBSIZE \ 130 (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) 131 /* Print buffer size */ 132 #define CONFIG_SYS_MAXARGS 16 /* max command args */ 133 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 134 /* Boot argument buffer size */ 135 #define CONFIG_AUTO_COMPLETE 136 #define CONFIG_CMDLINE_EDITING 137 #define CONFIG_ENV_VARS_UBOOT_CONFIG 138 #define CONFIG_PREBOOT "run check_flash check_env;" 139 140 /* 141 * Boot Linux 142 */ 143 #define CONFIG_CMDLINE_TAG /* send commandline to Kernel */ 144 #define CONFIG_SETUP_MEMORY_TAGS /* send memory definition to kernel */ 145 #define CONFIG_INITRD_TAG /* send initrd params */ 146 147 #define CONFIG_BOOTFILE __stringify(CONFIG_BOARD_NAME) "-linux.bin" 148 #define CONFIG_BOOTARGS "console=" __stringify(ACFG_CONSOLE_DEV) "," \ 149 __stringify(CONFIG_BAUDRATE) " " MTDPARTS_DEFAULT \ 150 " ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs " 151 152 #define ACFG_CONSOLE_DEV ttySMX0 153 #define CONFIG_BOOTCOMMAND "run ubifsboot" 154 #define CONFIG_SYS_AUTOLOAD "no" 155 /* 156 * Default load address for user programs and kernel 157 */ 158 #define CONFIG_LOADADDR 0xA0000000 159 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 160 161 /* 162 * Extra Environments 163 */ 164 #define CONFIG_EXTRA_ENV_SETTINGS \ 165 "env_version=" __stringify(CONFIG_ENV_VERSION) "\0" \ 166 "consoledev=" __stringify(ACFG_CONSOLE_DEV) "\0" \ 167 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 168 "partition=nand0,6\0" \ 169 "u-boot_addr=" __stringify(ACFG_MONITOR_OFFSET) "\0" \ 170 "env_addr=" __stringify(CONFIG_ENV_OFFSET) "\0" \ 171 "firmware_addr=" __stringify(CONFIG_FIRMWARE_OFFSET) "\0" \ 172 "firmware_size=" __stringify(CONFIG_FIRMWARE_SIZE) "\0" \ 173 "kernel_addr=" __stringify(CONFIG_KERNEL_OFFSET) "\0" \ 174 "rootfs_addr=" __stringify(CONFIG_ROOTFS_OFFSET) "\0" \ 175 "board_name=" __stringify(CONFIG_BOARD_NAME) "\0" \ 176 "kernel_addr_r=A0000000\0" \ 177 "check_env=if test -n ${flash_env_version}; " \ 178 "then env default env_version; " \ 179 "else env set flash_env_version ${env_version}; env save; "\ 180 "fi; " \ 181 "if itest ${flash_env_version} < ${env_version}; then " \ 182 "echo \"*** Warning - Environment version" \ 183 " change suggests: run flash_reset_env; reset\"; "\ 184 "env default flash_reset_env; "\ 185 "fi; \0" \ 186 "check_flash=nand lock; nand unlock ${env_addr}; \0" \ 187 "flash_reset_env=env default -f -a; saveenv; run update_env;" \ 188 "echo Flash environment variables erased!\0" \ 189 "download_uboot=tftpboot ${loadaddr} ${board_name}" \ 190 "-u-boot-with-spl.bin\0" \ 191 "flash_uboot=nand unlock ${u-boot_addr} ;" \ 192 "nand erase.part u-boot;" \ 193 "if nand write.trimffs ${fileaddr} ${u-boot_addr} ${filesize};"\ 194 "then nand lock; nand unlock ${env_addr};" \ 195 "echo Flashing of uboot succeed;" \ 196 "else echo Flashing of uboot failed;" \ 197 "fi; \0" \ 198 "update_uboot=run download_uboot flash_uboot\0" \ 199 "download_env=tftpboot ${loadaddr} ${board_name}" \ 200 "-u-boot-env.txt\0" \ 201 "flash_env=env import -t ${loadaddr}; env save; \0" \ 202 "update_env=run download_env flash_env\0" \ 203 "update_all=run update_env update_uboot\0" \ 204 "unlock_regs=mw 10000008 0; mw 10020008 0\0" \ 205 206 /* 207 * Serial Driver 208 */ 209 #define CONFIG_MXC_UART 210 #define CONFIG_CONS_INDEX 1 211 #define CONFIG_BAUDRATE 115200 212 #define CONFIG_MXC_UART_BASE UART1_BASE 213 214 /* 215 * GPIO 216 */ 217 #define CONFIG_MXC_GPIO 218 219 /* 220 * NOR 221 */ 222 223 /* 224 * NAND 225 */ 226 #define CONFIG_NAND_MXC 227 228 #define CONFIG_MXC_NAND_REGS_BASE 0xD8000000 229 #define CONFIG_SYS_NAND_BASE CONFIG_MXC_NAND_REGS_BASE 230 #define CONFIG_SYS_MAX_NAND_DEVICE 1 231 232 #define CONFIG_MXC_NAND_HWECC 233 #define CONFIG_SYS_NAND_LARGEPAGE 234 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 235 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 236 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) 237 #define CONFIG_SYS_NAND_PAGE_COUNT CONFIG_SYS_NAND_BLOCK_SIZE / \ 238 CONFIG_SYS_NAND_PAGE_SIZE 239 #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024) 240 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 11 241 #define NAND_MAX_CHIPS 1 242 243 #define CONFIG_FLASH_SHOW_PROGRESS 45 244 #define CONFIG_SYS_NAND_QUIET 1 245 246 /* 247 * Partitions & Filsystems 248 */ 249 #define CONFIG_MTD_DEVICE 250 #define CONFIG_MTD_PARTITIONS 251 #define CONFIG_DOS_PARTITION 252 #define CONFIG_SUPPORT_VFAT 253 254 /* 255 * UBIFS 256 */ 257 #define CONFIG_RBTREE 258 #define CONFIG_LZO 259 260 /* 261 * Ethernet (on SOC imx FEC) 262 */ 263 #define CONFIG_FEC_MXC 264 #define CONFIG_FEC_MXC_PHYADDR 0x1f 265 #define CONFIG_MII /* MII PHY management */ 266 267 /* 268 * FPGA 269 */ 270 #ifndef CONFIG_SPL_BUILD 271 #define CONFIG_FPGA 272 #endif 273 #define CONFIG_FPGA_COUNT 1 274 #define CONFIG_FPGA_XILINX 275 #define CONFIG_FPGA_SPARTAN3 276 #define CONFIG_SYS_FPGA_WAIT 250 /* 250 ms */ 277 #define CONFIG_SYS_FPGA_PROG_FEEDBACK 278 #define CONFIG_SYS_FPGA_CHECK_CTRLC 279 #define CONFIG_SYS_FPGA_CHECK_ERROR 280 281 /* 282 * Fuses - IIM 283 */ 284 #ifdef CONFIG_CMD_IMX_FUSE 285 #define IIM_MAC_BANK 0 286 #define IIM_MAC_ROW 5 287 #define IIM0_SCC_KEY 11 288 #define IIM1_SUID 1 289 #endif 290 291 /* 292 * I2C 293 */ 294 295 #ifdef CONFIG_CMD_I2C 296 #define CONFIG_SYS_I2C 297 #define CONFIG_SYS_I2C_MXC 298 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 299 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 300 #define CONFIG_SYS_MXC_I2C1_SPEED 100000 /* 100 kHz */ 301 #define CONFIG_SYS_MXC_I2C1_SLAVE 0x7F 302 #define CONFIG_SYS_MXC_I2C2_SPEED 100000 /* 100 kHz */ 303 #define CONFIG_SYS_MXC_I2C2_SLAVE 0x7F 304 #define CONFIG_SYS_I2C_NOPROBES { } 305 306 #ifdef CONFIG_CMD_EEPROM 307 # define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM 24LC02 */ 308 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */ 309 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 310 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* msec */ 311 #endif /* CONFIG_CMD_EEPROM */ 312 #endif /* CONFIG_CMD_I2C */ 313 314 /* 315 * SD/MMC 316 */ 317 #ifdef CONFIG_CMD_MMC 318 #define CONFIG_MMC 319 #define CONFIG_GENERIC_MMC 320 #define CONFIG_MXC_MMC 321 #define CONFIG_MXC_MCI_REGS_BASE 0x10014000 322 #endif 323 324 /* 325 * RTC 326 */ 327 #ifdef CONFIG_CMD_DATE 328 #define CONFIG_RTC_DS1374 329 #define CONFIG_SYS_RTC_BUS_NUM 0 330 #endif /* CONFIG_CMD_DATE */ 331 332 /* 333 * PLL 334 * 335 * 31 | x |x| x x x x |x x x x x x x x x x |x x|x x x x|x x x x x x x x x x| 0 336 * |CPLM|X|----PD---|--------MFD---------|XXX|--MFI--|-----MFN-----------| 337 */ 338 #define CONFIG_MX27_CLK32 32768 /* 32768 or 32000 Hz crystal */ 339 340 #if (ACFG_SDRAM_MBYTE_SYZE == 64) /* micron MT46H16M32LF -6 */ 341 /* micron 64MB */ 342 #define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ 343 #define PHYS_SDRAM_2_SIZE 0x04000000 /* 64 MB */ 344 #endif 345 346 #if (ACFG_SDRAM_MBYTE_SYZE == 128) 347 /* micron 128MB */ 348 #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */ 349 #define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */ 350 #endif 351 352 #if (ACFG_SDRAM_MBYTE_SYZE == 256) 353 /* micron 256MB */ 354 #define PHYS_SDRAM_1_SIZE 0x10000000 /* 256 MB */ 355 #define PHYS_SDRAM_2_SIZE 0x10000000 /* 256 MB */ 356 #endif 357 358 #endif /* __CONFIG_H */ 359