1 /* 2 * Configuation settings for the Alpha Project AP-SH4A-4A board 3 * 4 * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __AP_SH4A_4A_H 10 #define __AP_SH4A_4A_H 11 12 #define CONFIG_CPU_SH7734 1 13 #define CONFIG_AP_SH4A_4A 1 14 #define CONFIG_400MHZ_MODE 1 15 /* #define CONFIG_533MHZ_MODE 1 */ 16 17 #define CONFIG_SYS_TEXT_BASE 0x8BFC0000 18 19 #define CONFIG_CMD_SDRAM 20 21 #define CONFIG_BOOTARGS "console=ttySC4,115200" 22 23 #define CONFIG_DISPLAY_BOARDINFO 24 #undef CONFIG_SHOW_BOOT_PROGRESS 25 26 /* Ether */ 27 #define CONFIG_SH_ETHER 1 28 #define CONFIG_SH_ETHER_USE_PORT (0) 29 #define CONFIG_SH_ETHER_PHY_ADDR (0x0) 30 #define CONFIG_SH_ETHER_PHY_MODE (PHY_INTERFACE_MODE_GMII) 31 #define CONFIG_SH_ETHER_SH7734_MII (0x02) /* GMII */ 32 #define CONFIG_BITBANGMII 33 #define CONFIG_BITBANGMII_MULTI 34 35 /* undef to save memory */ 36 #define CONFIG_SYS_LONGHELP 37 /* Monitor Command Prompt */ 38 /* Buffer size for input from the Console */ 39 #define CONFIG_SYS_CBSIZE 256 40 /* Buffer size for Console output */ 41 #define CONFIG_SYS_PBSIZE 256 42 /* max args accepted for monitor commands */ 43 #define CONFIG_SYS_MAXARGS 16 44 /* Buffer size for Boot Arguments passed to kernel */ 45 #define CONFIG_SYS_BARGSIZE 512 46 /* List of legal baudrate settings for this board */ 47 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } 48 49 /* SCIF */ 50 #define CONFIG_SCIF 1 51 #define CONFIG_CONS_SCIF4 1 52 53 /* Suppress display of console information at boot */ 54 55 /* SDRAM */ 56 #define CONFIG_SYS_SDRAM_BASE (0x88000000) 57 #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) 58 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024) 59 60 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) 61 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE) 62 /* Enable alternate, more extensive, memory test */ 63 #undef CONFIG_SYS_ALT_MEMTEST 64 /* Scratch address used by the alternate memory test */ 65 #undef CONFIG_SYS_MEMTEST_SCRATCH 66 67 /* Enable temporary baudrate change while serial download */ 68 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 69 70 /* FLASH */ 71 #define CONFIG_FLASH_CFI_DRIVER 1 72 #define CONFIG_SYS_FLASH_CFI 73 #undef CONFIG_SYS_FLASH_QUIET_TEST 74 #define CONFIG_SYS_FLASH_EMPTY_INFO 75 #define CONFIG_SYS_FLASH_BASE (0xA0000000) 76 #define CONFIG_SYS_MAX_FLASH_SECT 512 77 78 /* if you use all NOR Flash , you change dip-switch. Please see Manual. */ 79 #define CONFIG_SYS_MAX_FLASH_BANKS 1 80 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 81 82 /* Timeout for Flash erase operations (in ms) */ 83 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) 84 /* Timeout for Flash write operations (in ms) */ 85 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) 86 /* Timeout for Flash set sector lock bit operations (in ms) */ 87 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) 88 /* Timeout for Flash clear lock bit operations (in ms) */ 89 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) 90 91 /* 92 * Use hardware flash sectors protection instead 93 * of U-Boot software protection 94 */ 95 #undef CONFIG_SYS_FLASH_PROTECTION 96 #undef CONFIG_SYS_DIRECT_FLASH_TFTP 97 98 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ 99 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) 100 /* Monitor size */ 101 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) 102 /* Size of DRAM reserved for malloc() use */ 103 #define CONFIG_SYS_MALLOC_LEN (256 * 1024) 104 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 105 106 /* ENV setting */ 107 #define CONFIG_ENV_OVERWRITE 1 108 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 109 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 110 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) 111 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ 112 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) 113 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) 114 115 /* Board Clock */ 116 #if defined(CONFIG_400MHZ_MODE) 117 #define CONFIG_SYS_CLK_FREQ 50000000 118 #else 119 #define CONFIG_SYS_CLK_FREQ 44444444 120 #endif 121 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 122 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 123 #define CONFIG_SYS_TMU_CLK_DIV 4 124 125 #endif /* __AP_SH4A_4A_H */ 126