1 /* 2 * Configuation settings for the Alpha Project AP-SH4A-4A board 3 * 4 * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __AP_SH4A_4A_H 10 #define __AP_SH4A_4A_H 11 12 #undef DEBUG 13 #define CONFIG_CPU_SH7734 1 14 #define CONFIG_AP_SH4A_4A 1 15 #define CONFIG_400MHZ_MODE 1 16 /* #define CONFIG_533MHZ_MODE 1 */ 17 18 #define CONFIG_BOARD_LATE_INIT 19 #define CONFIG_SYS_TEXT_BASE 0x8BFC0000 20 21 #define CONFIG_CMD_FLASH 22 #define CONFIG_CMD_MEMORY 23 #define CONFIG_CMD_PING 24 #define CONFIG_CMD_MII 25 #define CONFIG_CMD_NFS 26 #define CONFIG_CMD_SDRAM 27 #define CONFIG_CMD_ENV 28 #define CONFIG_CMD_SAVEENV 29 30 #define CONFIG_BAUDRATE 115200 31 #define CONFIG_BOOTDELAY 3 32 #define CONFIG_BOOTARGS "console=ttySC4,115200" 33 34 #define CONFIG_VERSION_VARIABLE 35 #undef CONFIG_SHOW_BOOT_PROGRESS 36 37 /* Ether */ 38 #define CONFIG_SH_ETHER 1 39 #define CONFIG_SH_ETHER_USE_PORT (0) 40 #define CONFIG_SH_ETHER_PHY_ADDR (0x0) 41 #define CONFIG_SH_ETHER_PHY_MODE (PHY_INTERFACE_MODE_GMII) 42 #define CONFIG_SH_ETHER_SH7734_MII (0x02) /* GMII */ 43 #define CONFIG_PHYLIB 44 #define CONFIG_PHY_MICREL 1 45 #define CONFIG_BITBANGMII 46 #define CONFIG_BITBANGMII_MULTI 47 48 /* I2C */ 49 #define CONFIG_CMD_I2C 50 #define CONFIG_SH_SH7734_I2C 1 51 #define CONFIG_HARD_I2C 1 52 #define CONFIG_I2C_MULTI_BUS 1 53 #define CONFIG_SYS_MAX_I2C_BUS 2 54 #define CONFIG_SYS_I2C_MODULE 0 55 #define CONFIG_SYS_I2C_SPEED 400000 /* 400 kHz */ 56 #define CONFIG_SYS_I2C_SLAVE 0x50 57 #define CONFIG_SH_I2C_DATA_HIGH 4 58 #define CONFIG_SH_I2C_DATA_LOW 5 59 #define CONFIG_SH_I2C_CLOCK 500000000 60 #define CONFIG_SH_I2C_BASE0 0xFFC70000 61 #define CONFIG_SH_I2C_BASE1 0xFFC71000 62 63 /* undef to save memory */ 64 #define CONFIG_SYS_LONGHELP 65 /* Monitor Command Prompt */ 66 /* Buffer size for input from the Console */ 67 #define CONFIG_SYS_CBSIZE 256 68 /* Buffer size for Console output */ 69 #define CONFIG_SYS_PBSIZE 256 70 /* max args accepted for monitor commands */ 71 #define CONFIG_SYS_MAXARGS 16 72 /* Buffer size for Boot Arguments passed to kernel */ 73 #define CONFIG_SYS_BARGSIZE 512 74 /* List of legal baudrate settings for this board */ 75 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } 76 77 /* SCIF */ 78 #define CONFIG_SCIF_CONSOLE 1 79 #define CONFIG_SCIF 1 80 #define CONFIG_CONS_SCIF4 1 81 82 /* Suppress display of console information at boot */ 83 #undef CONFIG_SYS_CONSOLE_INFO_QUIET 84 #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 85 #undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE 86 87 /* SDRAM */ 88 #define CONFIG_SYS_SDRAM_BASE (0x88000000) 89 #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) 90 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024) 91 92 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) 93 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE) 94 /* Enable alternate, more extensive, memory test */ 95 #undef CONFIG_SYS_ALT_MEMTEST 96 /* Scratch address used by the alternate memory test */ 97 #undef CONFIG_SYS_MEMTEST_SCRATCH 98 99 /* Enable temporary baudrate change while serial download */ 100 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 101 102 /* FLASH */ 103 #define CONFIG_FLASH_CFI_DRIVER 1 104 #define CONFIG_SYS_FLASH_CFI 105 #undef CONFIG_SYS_FLASH_QUIET_TEST 106 #define CONFIG_SYS_FLASH_EMPTY_INFO 107 #define CONFIG_SYS_FLASH_BASE (0xA0000000) 108 #define CONFIG_SYS_MAX_FLASH_SECT 512 109 110 /* if you use all NOR Flash , you change dip-switch. Please see Manual. */ 111 #define CONFIG_SYS_MAX_FLASH_BANKS 1 112 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 113 114 /* Timeout for Flash erase operations (in ms) */ 115 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) 116 /* Timeout for Flash write operations (in ms) */ 117 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) 118 /* Timeout for Flash set sector lock bit operations (in ms) */ 119 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) 120 /* Timeout for Flash clear lock bit operations (in ms) */ 121 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) 122 123 /* 124 * Use hardware flash sectors protection instead 125 * of U-Boot software protection 126 */ 127 #undef CONFIG_SYS_FLASH_PROTECTION 128 #undef CONFIG_SYS_DIRECT_FLASH_TFTP 129 130 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ 131 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) 132 /* Monitor size */ 133 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) 134 /* Size of DRAM reserved for malloc() use */ 135 #define CONFIG_SYS_MALLOC_LEN (256 * 1024) 136 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 137 138 /* ENV setting */ 139 #define CONFIG_ENV_IS_IN_FLASH 140 #define CONFIG_ENV_OVERWRITE 1 141 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 142 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 143 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) 144 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ 145 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) 146 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) 147 148 /* Board Clock */ 149 #if defined(CONFIG_400MHZ_MODE) 150 #define CONFIG_SYS_CLK_FREQ 50000000 151 #else 152 #define CONFIG_SYS_CLK_FREQ 44444444 153 #endif 154 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 155 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 156 #define CONFIG_SYS_TMU_CLK_DIV 4 157 158 #endif /* __AP_SH4A_4A_H */ 159