1 /* 2 * Configuation settings for the Alpha Project AP-SH4A-4A board 3 * 4 * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __AP_SH4A_4A_H 10 #define __AP_SH4A_4A_H 11 12 #define CONFIG_CPU_SH7734 1 13 #define CONFIG_AP_SH4A_4A 1 14 #define CONFIG_400MHZ_MODE 1 15 /* #define CONFIG_533MHZ_MODE 1 */ 16 17 #define CONFIG_SYS_TEXT_BASE 0x8BFC0000 18 19 #define CONFIG_CMD_SDRAM 20 #define CONFIG_CMD_ENV 21 22 #define CONFIG_BAUDRATE 115200 23 #define CONFIG_BOOTARGS "console=ttySC4,115200" 24 25 #define CONFIG_DISPLAY_BOARDINFO 26 #undef CONFIG_SHOW_BOOT_PROGRESS 27 28 /* Ether */ 29 #define CONFIG_SH_ETHER 1 30 #define CONFIG_SH_ETHER_USE_PORT (0) 31 #define CONFIG_SH_ETHER_PHY_ADDR (0x0) 32 #define CONFIG_SH_ETHER_PHY_MODE (PHY_INTERFACE_MODE_GMII) 33 #define CONFIG_SH_ETHER_SH7734_MII (0x02) /* GMII */ 34 #define CONFIG_PHYLIB 35 #define CONFIG_PHY_MICREL 1 36 #define CONFIG_BITBANGMII 37 #define CONFIG_BITBANGMII_MULTI 38 39 /* I2C */ 40 #define CONFIG_SH_SH7734_I2C 1 41 #define CONFIG_HARD_I2C 1 42 #define CONFIG_I2C_MULTI_BUS 1 43 #define CONFIG_SYS_MAX_I2C_BUS 2 44 #define CONFIG_SYS_I2C_MODULE 0 45 #define CONFIG_SYS_I2C_SPEED 400000 /* 400 kHz */ 46 #define CONFIG_SYS_I2C_SLAVE 0x50 47 #define CONFIG_SH_I2C_DATA_HIGH 4 48 #define CONFIG_SH_I2C_DATA_LOW 5 49 #define CONFIG_SH_I2C_CLOCK 500000000 50 #define CONFIG_SH_I2C_BASE0 0xFFC70000 51 #define CONFIG_SH_I2C_BASE1 0xFFC71000 52 53 /* undef to save memory */ 54 #define CONFIG_SYS_LONGHELP 55 /* Monitor Command Prompt */ 56 /* Buffer size for input from the Console */ 57 #define CONFIG_SYS_CBSIZE 256 58 /* Buffer size for Console output */ 59 #define CONFIG_SYS_PBSIZE 256 60 /* max args accepted for monitor commands */ 61 #define CONFIG_SYS_MAXARGS 16 62 /* Buffer size for Boot Arguments passed to kernel */ 63 #define CONFIG_SYS_BARGSIZE 512 64 /* List of legal baudrate settings for this board */ 65 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } 66 67 /* SCIF */ 68 #define CONFIG_SCIF_CONSOLE 1 69 #define CONFIG_SCIF 1 70 #define CONFIG_CONS_SCIF4 1 71 72 /* Suppress display of console information at boot */ 73 74 /* SDRAM */ 75 #define CONFIG_SYS_SDRAM_BASE (0x88000000) 76 #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) 77 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024) 78 79 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) 80 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE) 81 /* Enable alternate, more extensive, memory test */ 82 #undef CONFIG_SYS_ALT_MEMTEST 83 /* Scratch address used by the alternate memory test */ 84 #undef CONFIG_SYS_MEMTEST_SCRATCH 85 86 /* Enable temporary baudrate change while serial download */ 87 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 88 89 /* FLASH */ 90 #define CONFIG_FLASH_CFI_DRIVER 1 91 #define CONFIG_SYS_FLASH_CFI 92 #undef CONFIG_SYS_FLASH_QUIET_TEST 93 #define CONFIG_SYS_FLASH_EMPTY_INFO 94 #define CONFIG_SYS_FLASH_BASE (0xA0000000) 95 #define CONFIG_SYS_MAX_FLASH_SECT 512 96 97 /* if you use all NOR Flash , you change dip-switch. Please see Manual. */ 98 #define CONFIG_SYS_MAX_FLASH_BANKS 1 99 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 100 101 /* Timeout for Flash erase operations (in ms) */ 102 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) 103 /* Timeout for Flash write operations (in ms) */ 104 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) 105 /* Timeout for Flash set sector lock bit operations (in ms) */ 106 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) 107 /* Timeout for Flash clear lock bit operations (in ms) */ 108 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) 109 110 /* 111 * Use hardware flash sectors protection instead 112 * of U-Boot software protection 113 */ 114 #undef CONFIG_SYS_FLASH_PROTECTION 115 #undef CONFIG_SYS_DIRECT_FLASH_TFTP 116 117 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ 118 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) 119 /* Monitor size */ 120 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) 121 /* Size of DRAM reserved for malloc() use */ 122 #define CONFIG_SYS_MALLOC_LEN (256 * 1024) 123 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 124 125 /* ENV setting */ 126 #define CONFIG_ENV_IS_IN_FLASH 127 #define CONFIG_ENV_OVERWRITE 1 128 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 129 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 130 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) 131 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ 132 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) 133 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) 134 135 /* Board Clock */ 136 #if defined(CONFIG_400MHZ_MODE) 137 #define CONFIG_SYS_CLK_FREQ 50000000 138 #else 139 #define CONFIG_SYS_CLK_FREQ 44444444 140 #endif 141 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 142 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 143 #define CONFIG_SYS_TMU_CLK_DIV 4 144 145 #endif /* __AP_SH4A_4A_H */ 146