1 /* 2 * Configuation settings for the Alpha Project AP-SH4A-4A board 3 * 4 * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __AP_SH4A_4A_H 10 #define __AP_SH4A_4A_H 11 12 #undef DEBUG 13 #define CONFIG_CPU_SH7734 1 14 #define CONFIG_AP_SH4A_4A 1 15 #define CONFIG_400MHZ_MODE 1 16 /* #define CONFIG_533MHZ_MODE 1 */ 17 18 #define CONFIG_BOARD_LATE_INIT 19 #define CONFIG_SYS_TEXT_BASE 0x8BFC0000 20 21 #define CONFIG_CMD_SDRAM 22 #define CONFIG_CMD_ENV 23 24 #define CONFIG_BAUDRATE 115200 25 #define CONFIG_BOOTARGS "console=ttySC4,115200" 26 27 #undef CONFIG_SHOW_BOOT_PROGRESS 28 29 /* Ether */ 30 #define CONFIG_SH_ETHER 1 31 #define CONFIG_SH_ETHER_USE_PORT (0) 32 #define CONFIG_SH_ETHER_PHY_ADDR (0x0) 33 #define CONFIG_SH_ETHER_PHY_MODE (PHY_INTERFACE_MODE_GMII) 34 #define CONFIG_SH_ETHER_SH7734_MII (0x02) /* GMII */ 35 #define CONFIG_PHYLIB 36 #define CONFIG_PHY_MICREL 1 37 #define CONFIG_BITBANGMII 38 #define CONFIG_BITBANGMII_MULTI 39 40 /* I2C */ 41 #define CONFIG_SH_SH7734_I2C 1 42 #define CONFIG_HARD_I2C 1 43 #define CONFIG_I2C_MULTI_BUS 1 44 #define CONFIG_SYS_MAX_I2C_BUS 2 45 #define CONFIG_SYS_I2C_MODULE 0 46 #define CONFIG_SYS_I2C_SPEED 400000 /* 400 kHz */ 47 #define CONFIG_SYS_I2C_SLAVE 0x50 48 #define CONFIG_SH_I2C_DATA_HIGH 4 49 #define CONFIG_SH_I2C_DATA_LOW 5 50 #define CONFIG_SH_I2C_CLOCK 500000000 51 #define CONFIG_SH_I2C_BASE0 0xFFC70000 52 #define CONFIG_SH_I2C_BASE1 0xFFC71000 53 54 /* undef to save memory */ 55 #define CONFIG_SYS_LONGHELP 56 /* Monitor Command Prompt */ 57 /* Buffer size for input from the Console */ 58 #define CONFIG_SYS_CBSIZE 256 59 /* Buffer size for Console output */ 60 #define CONFIG_SYS_PBSIZE 256 61 /* max args accepted for monitor commands */ 62 #define CONFIG_SYS_MAXARGS 16 63 /* Buffer size for Boot Arguments passed to kernel */ 64 #define CONFIG_SYS_BARGSIZE 512 65 /* List of legal baudrate settings for this board */ 66 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } 67 68 /* SCIF */ 69 #define CONFIG_SCIF_CONSOLE 1 70 #define CONFIG_SCIF 1 71 #define CONFIG_CONS_SCIF4 1 72 73 /* Suppress display of console information at boot */ 74 75 /* SDRAM */ 76 #define CONFIG_SYS_SDRAM_BASE (0x88000000) 77 #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) 78 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024) 79 80 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) 81 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE) 82 /* Enable alternate, more extensive, memory test */ 83 #undef CONFIG_SYS_ALT_MEMTEST 84 /* Scratch address used by the alternate memory test */ 85 #undef CONFIG_SYS_MEMTEST_SCRATCH 86 87 /* Enable temporary baudrate change while serial download */ 88 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 89 90 /* FLASH */ 91 #define CONFIG_FLASH_CFI_DRIVER 1 92 #define CONFIG_SYS_FLASH_CFI 93 #undef CONFIG_SYS_FLASH_QUIET_TEST 94 #define CONFIG_SYS_FLASH_EMPTY_INFO 95 #define CONFIG_SYS_FLASH_BASE (0xA0000000) 96 #define CONFIG_SYS_MAX_FLASH_SECT 512 97 98 /* if you use all NOR Flash , you change dip-switch. Please see Manual. */ 99 #define CONFIG_SYS_MAX_FLASH_BANKS 1 100 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 101 102 /* Timeout for Flash erase operations (in ms) */ 103 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) 104 /* Timeout for Flash write operations (in ms) */ 105 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) 106 /* Timeout for Flash set sector lock bit operations (in ms) */ 107 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) 108 /* Timeout for Flash clear lock bit operations (in ms) */ 109 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) 110 111 /* 112 * Use hardware flash sectors protection instead 113 * of U-Boot software protection 114 */ 115 #undef CONFIG_SYS_FLASH_PROTECTION 116 #undef CONFIG_SYS_DIRECT_FLASH_TFTP 117 118 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ 119 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) 120 /* Monitor size */ 121 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) 122 /* Size of DRAM reserved for malloc() use */ 123 #define CONFIG_SYS_MALLOC_LEN (256 * 1024) 124 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 125 126 /* ENV setting */ 127 #define CONFIG_ENV_IS_IN_FLASH 128 #define CONFIG_ENV_OVERWRITE 1 129 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 130 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 131 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) 132 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ 133 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) 134 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) 135 136 /* Board Clock */ 137 #if defined(CONFIG_400MHZ_MODE) 138 #define CONFIG_SYS_CLK_FREQ 50000000 139 #else 140 #define CONFIG_SYS_CLK_FREQ 44444444 141 #endif 142 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 143 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 144 #define CONFIG_SYS_TMU_CLK_DIV 4 145 146 #endif /* __AP_SH4A_4A_H */ 147