xref: /openbmc/u-boot/include/configs/ap_sh4a_4a.h (revision 8f240a3b)
1 /*
2  * Configuation settings for the Alpha Project AP-SH4A-4A board
3  *
4  * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __AP_SH4A_4A_H
10 #define __AP_SH4A_4A_H
11 
12 #define CONFIG_CPU_SH7734	1
13 #define CONFIG_400MHZ_MODE	1
14 
15 #define CONFIG_DISPLAY_BOARDINFO
16 #undef  CONFIG_SHOW_BOOT_PROGRESS
17 
18 /* Ether */
19 #define CONFIG_SH_ETHER_USE_PORT (0)
20 #define CONFIG_SH_ETHER_PHY_ADDR (0x0)
21 #define CONFIG_SH_ETHER_PHY_MODE (PHY_INTERFACE_MODE_GMII)
22 #define CONFIG_SH_ETHER_SH7734_MII (0x02) /* GMII */
23 #define CONFIG_BITBANGMII
24 #define CONFIG_BITBANGMII_MULTI
25 
26 /* undef to save memory	*/
27 /* Monitor Command Prompt */
28 /* Buffer size for Console output */
29 #define CONFIG_SYS_PBSIZE		256
30 /* List of legal baudrate settings for this board */
31 #define CONFIG_SYS_BAUDRATE_TABLE	{ 115200 }
32 
33 /* SCIF */
34 #define CONFIG_SCIF			1
35 #define CONFIG_CONS_SCIF4	1
36 
37 /* Suppress display of console information at boot */
38 
39 /* SDRAM */
40 #define CONFIG_SYS_SDRAM_BASE	(0x88000000)
41 #define CONFIG_SYS_SDRAM_SIZE	(64 * 1024 * 1024)
42 #define CONFIG_SYS_LOAD_ADDR	(CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)
43 
44 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
45 #define CONFIG_SYS_MEMTEST_END	 (CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE)
46 /* Enable alternate, more extensive, memory test */
47 #undef  CONFIG_SYS_ALT_MEMTEST
48 /* Scratch address used by the alternate memory test */
49 #undef  CONFIG_SYS_MEMTEST_SCRATCH
50 
51 /* Enable temporary baudrate change while serial download */
52 #undef  CONFIG_SYS_LOADS_BAUD_CHANGE
53 
54 /* FLASH */
55 #define CONFIG_FLASH_CFI_DRIVER 1
56 #define CONFIG_SYS_FLASH_CFI
57 #undef  CONFIG_SYS_FLASH_QUIET_TEST
58 #define CONFIG_SYS_FLASH_EMPTY_INFO
59 #define CONFIG_SYS_FLASH_BASE	(0xA0000000)
60 #define CONFIG_SYS_MAX_FLASH_SECT	512
61 
62 /* if you use all NOR Flash , you change dip-switch. Please see Manual. */
63 #define CONFIG_SYS_MAX_FLASH_BANKS	1
64 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
65 
66 /* Timeout for Flash erase operations (in ms) */
67 #define CONFIG_SYS_FLASH_ERASE_TOUT	(3 * 1000)
68 /* Timeout for Flash write operations (in ms) */
69 #define CONFIG_SYS_FLASH_WRITE_TOUT	(3 * 1000)
70 /* Timeout for Flash set sector lock bit operations (in ms) */
71 #define CONFIG_SYS_FLASH_LOCK_TOUT	(3 * 1000)
72 /* Timeout for Flash clear lock bit operations (in ms) */
73 #define CONFIG_SYS_FLASH_UNLOCK_TOUT	(3 * 1000)
74 
75 /*
76  * Use hardware flash sectors protection instead
77  * of U-Boot software protection
78  */
79 #undef  CONFIG_SYS_FLASH_PROTECTION
80 #undef  CONFIG_SYS_DIRECT_FLASH_TFTP
81 
82 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
83 #define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_FLASH_BASE)
84 /* Monitor size */
85 #define CONFIG_SYS_MONITOR_LEN	(256 * 1024)
86 /* Size of DRAM reserved for malloc() use */
87 #define CONFIG_SYS_MALLOC_LEN	(256 * 1024)
88 #define CONFIG_SYS_BOOTMAPSZ	(8 * 1024 * 1024)
89 
90 /* ENV setting */
91 #define CONFIG_ENV_OVERWRITE	1
92 #define CONFIG_ENV_SECT_SIZE	(128 * 1024)
93 #define CONFIG_ENV_SIZE		(CONFIG_ENV_SECT_SIZE)
94 #define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
95 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
96 #define CONFIG_ENV_OFFSET	(CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
97 #define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SECT_SIZE)
98 
99 /* Board Clock */
100 #if defined(CONFIG_400MHZ_MODE)
101 #define CONFIG_SYS_CLK_FREQ 50000000
102 #else
103 #define CONFIG_SYS_CLK_FREQ 44444444
104 #endif
105 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
106 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
107 #define CONFIG_SYS_TMU_CLK_DIV      4
108 
109 #endif	/* __AP_SH4A_4A_H */
110