1 /* 2 * Configuation settings for the Alpha Project AP-SH4A-4A board 3 * 4 * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __AP_SH4A_4A_H 10 #define __AP_SH4A_4A_H 11 12 #undef DEBUG 13 #define CONFIG_SH 1 14 #define CONFIG_SH4 1 15 #define CONFIG_SH4A 1 16 #define CONFIG_CPU_SH7734 1 17 #define CONFIG_AP_SH4A_4A 1 18 #define CONFIG_400MHZ_MODE 1 19 /* #define CONFIG_533MHZ_MODE 1 */ 20 21 #define CONFIG_BOARD_LATE_INIT 22 #define CONFIG_SYS_TEXT_BASE 0x8BFC0000 23 24 #define CONFIG_CMD_FLASH 25 #define CONFIG_CMD_MEMORY 26 #define CONFIG_CMD_NET 27 #define CONFIG_CMD_PING 28 #define CONFIG_CMD_MII 29 #define CONFIG_CMD_NFS 30 #define CONFIG_CMD_SDRAM 31 #define CONFIG_CMD_ENV 32 #define CONFIG_CMD_SAVEENV 33 34 #define CONFIG_BAUDRATE 115200 35 #define CONFIG_BOOTDELAY 3 36 #define CONFIG_BOOTARGS "console=ttySC4,115200" 37 38 #define CONFIG_VERSION_VARIABLE 39 #undef CONFIG_SHOW_BOOT_PROGRESS 40 41 /* Ether */ 42 #define CONFIG_SH_ETHER 1 43 #define CONFIG_SH_ETHER_USE_PORT (0) 44 #define CONFIG_SH_ETHER_PHY_ADDR (0x0) 45 #define CONFIG_SH_ETHER_PHY_MODE (PHY_INTERFACE_MODE_GMII) 46 #define CONFIG_SH_ETHER_SH7734_MII (0x02) /* GMII */ 47 #define CONFIG_PHYLIB 48 #define CONFIG_PHY_MICREL 1 49 #define CONFIG_BITBANGMII 50 #define CONFIG_BITBANGMII_MULTI 51 52 /* I2C */ 53 #define CONFIG_CMD_I2C 54 #define CONFIG_SH_SH7734_I2C 1 55 #define CONFIG_HARD_I2C 1 56 #define CONFIG_I2C_MULTI_BUS 1 57 #define CONFIG_SYS_MAX_I2C_BUS 2 58 #define CONFIG_SYS_I2C_MODULE 0 59 #define CONFIG_SYS_I2C_SPEED 400000 /* 400 kHz */ 60 #define CONFIG_SYS_I2C_SLAVE 0x50 61 #define CONFIG_SH_I2C_DATA_HIGH 4 62 #define CONFIG_SH_I2C_DATA_LOW 5 63 #define CONFIG_SH_I2C_CLOCK 500000000 64 #define CONFIG_SH_I2C_BASE0 0xFFC70000 65 #define CONFIG_SH_I2C_BASE1 0xFFC71000 66 67 /* undef to save memory */ 68 #define CONFIG_SYS_LONGHELP 69 /* Monitor Command Prompt */ 70 #define CONFIG_SYS_PROMPT "=> " 71 /* Buffer size for input from the Console */ 72 #define CONFIG_SYS_CBSIZE 256 73 /* Buffer size for Console output */ 74 #define CONFIG_SYS_PBSIZE 256 75 /* max args accepted for monitor commands */ 76 #define CONFIG_SYS_MAXARGS 16 77 /* Buffer size for Boot Arguments passed to kernel */ 78 #define CONFIG_SYS_BARGSIZE 512 79 /* List of legal baudrate settings for this board */ 80 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } 81 82 /* SCIF */ 83 #define CONFIG_SCIF_CONSOLE 1 84 #define CONFIG_SCIF 1 85 #define CONFIG_CONS_SCIF4 1 86 87 /* Suppress display of console information at boot */ 88 #undef CONFIG_SYS_CONSOLE_INFO_QUIET 89 #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 90 #undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE 91 92 /* SDRAM */ 93 #define CONFIG_SYS_SDRAM_BASE (0x88000000) 94 #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) 95 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024) 96 97 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) 98 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE) 99 /* Enable alternate, more extensive, memory test */ 100 #undef CONFIG_SYS_ALT_MEMTEST 101 /* Scratch address used by the alternate memory test */ 102 #undef CONFIG_SYS_MEMTEST_SCRATCH 103 104 /* Enable temporary baudrate change while serial download */ 105 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 106 107 /* FLASH */ 108 #define CONFIG_FLASH_CFI_DRIVER 1 109 #define CONFIG_SYS_FLASH_CFI 110 #undef CONFIG_SYS_FLASH_QUIET_TEST 111 #define CONFIG_SYS_FLASH_EMPTY_INFO 112 #define CONFIG_SYS_FLASH_BASE (0xA0000000) 113 #define CONFIG_SYS_MAX_FLASH_SECT 512 114 115 /* if you use all NOR Flash , you change dip-switch. Please see Manual. */ 116 #define CONFIG_SYS_MAX_FLASH_BANKS 1 117 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 118 119 /* Timeout for Flash erase operations (in ms) */ 120 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) 121 /* Timeout for Flash write operations (in ms) */ 122 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) 123 /* Timeout for Flash set sector lock bit operations (in ms) */ 124 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) 125 /* Timeout for Flash clear lock bit operations (in ms) */ 126 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) 127 128 /* 129 * Use hardware flash sectors protection instead 130 * of U-Boot software protection 131 */ 132 #undef CONFIG_SYS_FLASH_PROTECTION 133 #undef CONFIG_SYS_DIRECT_FLASH_TFTP 134 135 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ 136 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) 137 /* Monitor size */ 138 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) 139 /* Size of DRAM reserved for malloc() use */ 140 #define CONFIG_SYS_MALLOC_LEN (256 * 1024) 141 /* size in bytes reserved for initial data */ 142 #define CONFIG_SYS_GBL_DATA_SIZE (256) 143 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 144 145 /* ENV setting */ 146 #define CONFIG_ENV_IS_IN_FLASH 147 #define CONFIG_ENV_OVERWRITE 1 148 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 149 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 150 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) 151 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ 152 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) 153 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) 154 155 /* Board Clock */ 156 #if defined(CONFIG_400MHZ_MODE) 157 #define CONFIG_SYS_CLK_FREQ 50000000 158 #else 159 #define CONFIG_SYS_CLK_FREQ 44444444 160 #endif 161 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 162 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 163 #define CONFIG_SYS_TMU_CLK_DIV 4 164 #define CONFIG_SYS_HZ 1000 165 166 #endif /* __AP_SH4A_4A_H */ 167