1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Configuation settings for the Alpha Project AP-SH4A-4A board 4 * 5 * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> 6 */ 7 8 #ifndef __AP_SH4A_4A_H 9 #define __AP_SH4A_4A_H 10 11 #define CONFIG_CPU_SH7734 1 12 #define CONFIG_400MHZ_MODE 1 13 14 #define CONFIG_DISPLAY_BOARDINFO 15 #undef CONFIG_SHOW_BOOT_PROGRESS 16 17 /* Ether */ 18 #define CONFIG_SH_ETHER_USE_PORT (0) 19 #define CONFIG_SH_ETHER_PHY_ADDR (0x0) 20 #define CONFIG_SH_ETHER_PHY_MODE (PHY_INTERFACE_MODE_GMII) 21 #define CONFIG_SH_ETHER_SH7734_MII (0x02) /* GMII */ 22 #define CONFIG_BITBANGMII 23 #define CONFIG_BITBANGMII_MULTI 24 25 /* undef to save memory */ 26 /* Monitor Command Prompt */ 27 /* Buffer size for Console output */ 28 #define CONFIG_SYS_PBSIZE 256 29 /* List of legal baudrate settings for this board */ 30 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } 31 32 /* SCIF */ 33 #define CONFIG_SCIF 1 34 #define CONFIG_CONS_SCIF4 1 35 36 /* Suppress display of console information at boot */ 37 38 /* SDRAM */ 39 #define CONFIG_SYS_SDRAM_BASE (0x88000000) 40 #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) 41 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024) 42 43 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) 44 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE) 45 /* Enable alternate, more extensive, memory test */ 46 /* Scratch address used by the alternate memory test */ 47 #undef CONFIG_SYS_MEMTEST_SCRATCH 48 49 /* Enable temporary baudrate change while serial download */ 50 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 51 52 /* FLASH */ 53 #define CONFIG_FLASH_CFI_DRIVER 1 54 #define CONFIG_SYS_FLASH_CFI 55 #undef CONFIG_SYS_FLASH_QUIET_TEST 56 #define CONFIG_SYS_FLASH_EMPTY_INFO 57 #define CONFIG_SYS_FLASH_BASE (0xA0000000) 58 #define CONFIG_SYS_MAX_FLASH_SECT 512 59 60 /* if you use all NOR Flash , you change dip-switch. Please see Manual. */ 61 #define CONFIG_SYS_MAX_FLASH_BANKS 1 62 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 63 64 /* Timeout for Flash erase operations (in ms) */ 65 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) 66 /* Timeout for Flash write operations (in ms) */ 67 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) 68 /* Timeout for Flash set sector lock bit operations (in ms) */ 69 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) 70 /* Timeout for Flash clear lock bit operations (in ms) */ 71 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) 72 73 /* 74 * Use hardware flash sectors protection instead 75 * of U-Boot software protection 76 */ 77 #undef CONFIG_SYS_FLASH_PROTECTION 78 #undef CONFIG_SYS_DIRECT_FLASH_TFTP 79 80 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ 81 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) 82 /* Monitor size */ 83 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) 84 /* Size of DRAM reserved for malloc() use */ 85 #define CONFIG_SYS_MALLOC_LEN (256 * 1024) 86 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 87 88 /* ENV setting */ 89 #define CONFIG_ENV_OVERWRITE 1 90 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 91 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 92 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) 93 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ 94 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) 95 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) 96 97 /* Board Clock */ 98 #if defined(CONFIG_400MHZ_MODE) 99 #define CONFIG_SYS_CLK_FREQ 50000000 100 #else 101 #define CONFIG_SYS_CLK_FREQ 44444444 102 #endif 103 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 104 105 #endif /* __AP_SH4A_4A_H */ 106