1 /* 2 * Configuation settings for the Alpha Project AP-SH4A-4A board 3 * 4 * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __AP_SH4A_4A_H 10 #define __AP_SH4A_4A_H 11 12 #define CONFIG_CPU_SH7734 1 13 #define CONFIG_AP_SH4A_4A 1 14 #define CONFIG_400MHZ_MODE 1 15 16 #define CONFIG_SYS_TEXT_BASE 0x8BFC0000 17 18 #define CONFIG_DISPLAY_BOARDINFO 19 #undef CONFIG_SHOW_BOOT_PROGRESS 20 21 /* Ether */ 22 #define CONFIG_SH_ETHER 1 23 #define CONFIG_SH_ETHER_USE_PORT (0) 24 #define CONFIG_SH_ETHER_PHY_ADDR (0x0) 25 #define CONFIG_SH_ETHER_PHY_MODE (PHY_INTERFACE_MODE_GMII) 26 #define CONFIG_SH_ETHER_SH7734_MII (0x02) /* GMII */ 27 #define CONFIG_BITBANGMII 28 #define CONFIG_BITBANGMII_MULTI 29 30 /* undef to save memory */ 31 #define CONFIG_SYS_LONGHELP 32 /* Monitor Command Prompt */ 33 /* Buffer size for Console output */ 34 #define CONFIG_SYS_PBSIZE 256 35 /* List of legal baudrate settings for this board */ 36 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } 37 38 /* SCIF */ 39 #define CONFIG_SCIF 1 40 #define CONFIG_CONS_SCIF4 1 41 42 /* Suppress display of console information at boot */ 43 44 /* SDRAM */ 45 #define CONFIG_SYS_SDRAM_BASE (0x88000000) 46 #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) 47 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024) 48 49 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) 50 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE) 51 /* Enable alternate, more extensive, memory test */ 52 #undef CONFIG_SYS_ALT_MEMTEST 53 /* Scratch address used by the alternate memory test */ 54 #undef CONFIG_SYS_MEMTEST_SCRATCH 55 56 /* Enable temporary baudrate change while serial download */ 57 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 58 59 /* FLASH */ 60 #define CONFIG_FLASH_CFI_DRIVER 1 61 #define CONFIG_SYS_FLASH_CFI 62 #undef CONFIG_SYS_FLASH_QUIET_TEST 63 #define CONFIG_SYS_FLASH_EMPTY_INFO 64 #define CONFIG_SYS_FLASH_BASE (0xA0000000) 65 #define CONFIG_SYS_MAX_FLASH_SECT 512 66 67 /* if you use all NOR Flash , you change dip-switch. Please see Manual. */ 68 #define CONFIG_SYS_MAX_FLASH_BANKS 1 69 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 70 71 /* Timeout for Flash erase operations (in ms) */ 72 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) 73 /* Timeout for Flash write operations (in ms) */ 74 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) 75 /* Timeout for Flash set sector lock bit operations (in ms) */ 76 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) 77 /* Timeout for Flash clear lock bit operations (in ms) */ 78 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) 79 80 /* 81 * Use hardware flash sectors protection instead 82 * of U-Boot software protection 83 */ 84 #undef CONFIG_SYS_FLASH_PROTECTION 85 #undef CONFIG_SYS_DIRECT_FLASH_TFTP 86 87 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ 88 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) 89 /* Monitor size */ 90 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) 91 /* Size of DRAM reserved for malloc() use */ 92 #define CONFIG_SYS_MALLOC_LEN (256 * 1024) 93 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 94 95 /* ENV setting */ 96 #define CONFIG_ENV_OVERWRITE 1 97 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 98 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 99 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) 100 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ 101 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) 102 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) 103 104 /* Board Clock */ 105 #if defined(CONFIG_400MHZ_MODE) 106 #define CONFIG_SYS_CLK_FREQ 50000000 107 #else 108 #define CONFIG_SYS_CLK_FREQ 44444444 109 #endif 110 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 111 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 112 #define CONFIG_SYS_TMU_CLK_DIV 4 113 114 #endif /* __AP_SH4A_4A_H */ 115