1 /* 2 * Configuation settings for the Renesas Solutions AP-325RXA board 3 * 4 * Copyright (C) 2008 Renesas Solutions Corp. 5 * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __AP325RXA_H 11 #define __AP325RXA_H 12 13 #define CONFIG_CPU_SH7723 1 14 15 #define CONFIG_DISPLAY_BOARDINFO 16 #undef CONFIG_SHOW_BOOT_PROGRESS 17 18 /* MEMORY */ 19 #define AP325RXA_SDRAM_BASE (0x88000000) 20 #define AP325RXA_FLASH_BASE_1 (0xA0000000) 21 #define AP325RXA_FLASH_BANK_SIZE (128 * 1024 * 1024) 22 23 /* undef to save memory */ 24 /* Monitor Command Prompt */ 25 /* Buffer size for Console output */ 26 #define CONFIG_SYS_PBSIZE 256 27 /* List of legal baudrate settings for this board */ 28 #define CONFIG_SYS_BAUDRATE_TABLE { 38400 } 29 30 /* SCIF */ 31 #define CONFIG_SCIF_A 1 /* SH7723 has SCIF and SCIFA */ 32 #define CONFIG_CONS_SCIF5 1 33 34 /* Suppress display of console information at boot */ 35 36 #define CONFIG_SYS_MEMTEST_START (AP325RXA_SDRAM_BASE) 37 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024)) 38 39 /* Enable alternate, more extensive, memory test */ 40 #undef CONFIG_SYS_ALT_MEMTEST 41 /* Scratch address used by the alternate memory test */ 42 #undef CONFIG_SYS_MEMTEST_SCRATCH 43 44 /* Enable temporary baudrate change while serial download */ 45 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 46 47 #define CONFIG_SYS_SDRAM_BASE (AP325RXA_SDRAM_BASE) 48 /* maybe more, but if so u-boot doesn't know about it... */ 49 #define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) 50 /* default load address for scripts ?!? */ 51 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024) 52 53 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ 54 #define CONFIG_SYS_MONITOR_BASE (AP325RXA_FLASH_BASE_1) 55 /* Monitor size */ 56 #define CONFIG_SYS_MONITOR_LEN (128 * 1024) 57 /* Size of DRAM reserved for malloc() use */ 58 #define CONFIG_SYS_MALLOC_LEN (256 * 1024) 59 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 60 61 /* FLASH */ 62 #define CONFIG_FLASH_CFI_DRIVER 1 63 #define CONFIG_SYS_FLASH_CFI 64 #undef CONFIG_SYS_FLASH_QUIET_TEST 65 /* print 'E' for empty sector on flinfo */ 66 #define CONFIG_SYS_FLASH_EMPTY_INFO 67 /* Physical start address of Flash memory */ 68 #define CONFIG_SYS_FLASH_BASE (AP325RXA_FLASH_BASE_1) 69 /* Max number of sectors on each Flash chip */ 70 #define CONFIG_SYS_MAX_FLASH_SECT 512 71 72 /* 73 * IDE support 74 */ 75 #define CONFIG_IDE_RESET 1 76 #define CONFIG_SYS_PIO_MODE 1 77 #define CONFIG_SYS_IDE_MAXBUS 1 /* IDE bus */ 78 #define CONFIG_SYS_IDE_MAXDEVICE 1 79 #define CONFIG_SYS_ATA_BASE_ADDR 0xB4180000 80 #define CONFIG_SYS_ATA_STRIDE 2 /* 1bit shift */ 81 #define CONFIG_SYS_ATA_DATA_OFFSET 0x200 /* data reg offset */ 82 #define CONFIG_SYS_ATA_REG_OFFSET 0x200 /* reg offset */ 83 #define CONFIG_SYS_ATA_ALT_OFFSET 0x210 /* alternate register offset */ 84 #define CONFIG_IDE_SWAP_IO 85 86 /* if you use all NOR Flash , you change dip-switch. Please see Manual. */ 87 #define CONFIG_SYS_MAX_FLASH_BANKS 1 88 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE + (0 * AP325RXA_FLASH_BANK_SIZE)} 89 90 /* Timeout for Flash erase operations (in ms) */ 91 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) 92 /* Timeout for Flash write operations (in ms) */ 93 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) 94 /* Timeout for Flash set sector lock bit operations (in ms) */ 95 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) 96 /* Timeout for Flash clear lock bit operations (in ms) */ 97 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) 98 99 /* 100 * Use hardware flash sectors protection instead 101 * of U-Boot software protection 102 */ 103 #undef CONFIG_SYS_FLASH_PROTECTION 104 #undef CONFIG_SYS_DIRECT_FLASH_TFTP 105 106 /* ENV setting */ 107 #define CONFIG_ENV_OVERWRITE 1 108 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 109 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 110 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) 111 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ 112 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) 113 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) 114 115 /* Board Clock */ 116 #define CONFIG_SYS_CLK_FREQ 33333333 117 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 118 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 119 #define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */ 120 121 #endif /* __AP325RXA_H */ 122