xref: /openbmc/u-boot/include/configs/ap325rxa.h (revision 90101386)
1 /*
2  * Configuation settings for the Renesas Solutions AP-325RXA board
3  *
4  * Copyright (C) 2008 Renesas Solutions Corp.
5  * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
6  *
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 #ifndef __AP325RXA_H
11 #define __AP325RXA_H
12 
13 #define CONFIG_CPU_SH7723	1
14 #define CONFIG_AP325RXA	1
15 
16 #define CONFIG_CMD_SDRAM
17 #define CONFIG_CMD_IDE
18 #define CONFIG_DOS_PARTITION
19 
20 #define CONFIG_BAUDRATE		38400
21 #define CONFIG_BOOTARGS		"console=ttySC2,38400"
22 
23 #define CONFIG_DISPLAY_BOARDINFO
24 #undef  CONFIG_SHOW_BOOT_PROGRESS
25 
26 /* SMC9118 */
27 #define CONFIG_SMC911X 1
28 #define CONFIG_SMC911X_32_BIT 1
29 #define CONFIG_SMC911X_BASE 0xB6080000
30 
31 /* MEMORY */
32 #define AP325RXA_SDRAM_BASE		(0x88000000)
33 #define AP325RXA_FLASH_BASE_1		(0xA0000000)
34 #define AP325RXA_FLASH_BANK_SIZE	(128 * 1024 * 1024)
35 
36 #define CONFIG_SYS_TEXT_BASE	0x8FFC0000
37 
38 /* undef to save memory	*/
39 #define CONFIG_SYS_LONGHELP
40 /* Monitor Command Prompt */
41 /* Buffer size for input from the Console */
42 #define CONFIG_SYS_CBSIZE		256
43 /* Buffer size for Console output */
44 #define CONFIG_SYS_PBSIZE		256
45 /* max args accepted for monitor commands */
46 #define CONFIG_SYS_MAXARGS		16
47 /* Buffer size for Boot Arguments passed to kernel */
48 #define CONFIG_SYS_BARGSIZE	512
49 /* List of legal baudrate settings for this board */
50 #define CONFIG_SYS_BAUDRATE_TABLE	{ 38400 }
51 
52 /* SCIF */
53 #define CONFIG_SCIF_CONSOLE 1
54 #define CONFIG_SCIF_A		1 /* SH7723 has SCIF and SCIFA */
55 #define CONFIG_CONS_SCIF5	1
56 
57 /* Suppress display of console information at boot */
58 
59 #define CONFIG_SYS_MEMTEST_START	(AP325RXA_SDRAM_BASE)
60 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
61 
62 /* Enable alternate, more extensive, memory test */
63 #undef  CONFIG_SYS_ALT_MEMTEST
64 /* Scratch address used by the alternate memory test */
65 #undef  CONFIG_SYS_MEMTEST_SCRATCH
66 
67 /* Enable temporary baudrate change while serial download */
68 #undef  CONFIG_SYS_LOADS_BAUD_CHANGE
69 
70 #define CONFIG_SYS_SDRAM_BASE	(AP325RXA_SDRAM_BASE)
71 /* maybe more, but if so u-boot doesn't know about it... */
72 #define CONFIG_SYS_SDRAM_SIZE	(128 * 1024 * 1024)
73 /* default load address for scripts ?!? */
74 #define CONFIG_SYS_LOAD_ADDR	(CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)
75 
76 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
77 #define CONFIG_SYS_MONITOR_BASE	(AP325RXA_FLASH_BASE_1)
78 /* Monitor size */
79 #define CONFIG_SYS_MONITOR_LEN	(128 * 1024)
80 /* Size of DRAM reserved for malloc() use */
81 #define CONFIG_SYS_MALLOC_LEN	(256 * 1024)
82 #define CONFIG_SYS_BOOTMAPSZ	(8 * 1024 * 1024)
83 
84 /* FLASH */
85 #define CONFIG_FLASH_CFI_DRIVER 1
86 #define CONFIG_SYS_FLASH_CFI
87 #undef  CONFIG_SYS_FLASH_QUIET_TEST
88 /* print 'E' for empty sector on flinfo */
89 #define CONFIG_SYS_FLASH_EMPTY_INFO
90 /* Physical start address of Flash memory */
91 #define CONFIG_SYS_FLASH_BASE	(AP325RXA_FLASH_BASE_1)
92 /* Max number of sectors on each Flash chip */
93 #define CONFIG_SYS_MAX_FLASH_SECT	512
94 
95 /*
96  * IDE support
97  */
98 #define CONFIG_IDE_RESET	1
99 #define CONFIG_SYS_PIO_MODE		1
100 #define CONFIG_SYS_IDE_MAXBUS		1	/* IDE bus */
101 #define CONFIG_SYS_IDE_MAXDEVICE	1
102 #define CONFIG_SYS_ATA_BASE_ADDR	0xB4180000
103 #define CONFIG_SYS_ATA_STRIDE		2	/* 1bit shift */
104 #define CONFIG_SYS_ATA_DATA_OFFSET	0x200	/* data reg offset */
105 #define CONFIG_SYS_ATA_REG_OFFSET	0x200	/* reg offset */
106 #define CONFIG_SYS_ATA_ALT_OFFSET	0x210	/* alternate register offset */
107 #define CONFIG_IDE_SWAP_IO
108 
109 /* if you use all NOR Flash , you change dip-switch. Please see Manual. */
110 #define CONFIG_SYS_MAX_FLASH_BANKS	1
111 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE + (0 * AP325RXA_FLASH_BANK_SIZE)}
112 
113 /* Timeout for Flash erase operations (in ms) */
114 #define CONFIG_SYS_FLASH_ERASE_TOUT	(3 * 1000)
115 /* Timeout for Flash write operations (in ms) */
116 #define CONFIG_SYS_FLASH_WRITE_TOUT	(3 * 1000)
117 /* Timeout for Flash set sector lock bit operations (in ms) */
118 #define CONFIG_SYS_FLASH_LOCK_TOUT	(3 * 1000)
119 /* Timeout for Flash clear lock bit operations (in ms) */
120 #define CONFIG_SYS_FLASH_UNLOCK_TOUT	(3 * 1000)
121 
122 /*
123  * Use hardware flash sectors protection instead
124  * of U-Boot software protection
125  */
126 #undef  CONFIG_SYS_FLASH_PROTECTION
127 #undef  CONFIG_SYS_DIRECT_FLASH_TFTP
128 
129 /* ENV setting */
130 #define CONFIG_ENV_IS_IN_FLASH
131 #define CONFIG_ENV_OVERWRITE	1
132 #define CONFIG_ENV_SECT_SIZE	(128 * 1024)
133 #define CONFIG_ENV_SIZE		(CONFIG_ENV_SECT_SIZE)
134 #define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
135 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
136 #define CONFIG_ENV_OFFSET		(CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
137 #define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SECT_SIZE)
138 
139 /* Board Clock */
140 #define CONFIG_SYS_CLK_FREQ	33333333
141 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
142 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
143 #define CONFIG_SYS_TMU_CLK_DIV		(4)	/* 4 (default), 16, 64, 256 or 1024 */
144 
145 #endif	/* __AP325RXA_H */
146