1 /* 2 * Configuation settings for the Renesas Solutions AP-325RXA board 3 * 4 * Copyright (C) 2008 Renesas Solutions Corp. 5 * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __AP325RXA_H 11 #define __AP325RXA_H 12 13 #define CONFIG_CPU_SH7723 1 14 #define CONFIG_AP325RXA 1 15 16 #define CONFIG_DISPLAY_BOARDINFO 17 #undef CONFIG_SHOW_BOOT_PROGRESS 18 19 /* SMC9118 */ 20 #define CONFIG_SMC911X 1 21 #define CONFIG_SMC911X_32_BIT 1 22 #define CONFIG_SMC911X_BASE 0xB6080000 23 24 /* MEMORY */ 25 #define AP325RXA_SDRAM_BASE (0x88000000) 26 #define AP325RXA_FLASH_BASE_1 (0xA0000000) 27 #define AP325RXA_FLASH_BANK_SIZE (128 * 1024 * 1024) 28 29 #define CONFIG_SYS_TEXT_BASE 0x8FFC0000 30 31 /* undef to save memory */ 32 #define CONFIG_SYS_LONGHELP 33 /* Monitor Command Prompt */ 34 /* Buffer size for Console output */ 35 #define CONFIG_SYS_PBSIZE 256 36 /* List of legal baudrate settings for this board */ 37 #define CONFIG_SYS_BAUDRATE_TABLE { 38400 } 38 39 /* SCIF */ 40 #define CONFIG_SCIF_A 1 /* SH7723 has SCIF and SCIFA */ 41 #define CONFIG_CONS_SCIF5 1 42 43 /* Suppress display of console information at boot */ 44 45 #define CONFIG_SYS_MEMTEST_START (AP325RXA_SDRAM_BASE) 46 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024)) 47 48 /* Enable alternate, more extensive, memory test */ 49 #undef CONFIG_SYS_ALT_MEMTEST 50 /* Scratch address used by the alternate memory test */ 51 #undef CONFIG_SYS_MEMTEST_SCRATCH 52 53 /* Enable temporary baudrate change while serial download */ 54 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 55 56 #define CONFIG_SYS_SDRAM_BASE (AP325RXA_SDRAM_BASE) 57 /* maybe more, but if so u-boot doesn't know about it... */ 58 #define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) 59 /* default load address for scripts ?!? */ 60 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024) 61 62 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ 63 #define CONFIG_SYS_MONITOR_BASE (AP325RXA_FLASH_BASE_1) 64 /* Monitor size */ 65 #define CONFIG_SYS_MONITOR_LEN (128 * 1024) 66 /* Size of DRAM reserved for malloc() use */ 67 #define CONFIG_SYS_MALLOC_LEN (256 * 1024) 68 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 69 70 /* FLASH */ 71 #define CONFIG_FLASH_CFI_DRIVER 1 72 #define CONFIG_SYS_FLASH_CFI 73 #undef CONFIG_SYS_FLASH_QUIET_TEST 74 /* print 'E' for empty sector on flinfo */ 75 #define CONFIG_SYS_FLASH_EMPTY_INFO 76 /* Physical start address of Flash memory */ 77 #define CONFIG_SYS_FLASH_BASE (AP325RXA_FLASH_BASE_1) 78 /* Max number of sectors on each Flash chip */ 79 #define CONFIG_SYS_MAX_FLASH_SECT 512 80 81 /* 82 * IDE support 83 */ 84 #define CONFIG_IDE_RESET 1 85 #define CONFIG_SYS_PIO_MODE 1 86 #define CONFIG_SYS_IDE_MAXBUS 1 /* IDE bus */ 87 #define CONFIG_SYS_IDE_MAXDEVICE 1 88 #define CONFIG_SYS_ATA_BASE_ADDR 0xB4180000 89 #define CONFIG_SYS_ATA_STRIDE 2 /* 1bit shift */ 90 #define CONFIG_SYS_ATA_DATA_OFFSET 0x200 /* data reg offset */ 91 #define CONFIG_SYS_ATA_REG_OFFSET 0x200 /* reg offset */ 92 #define CONFIG_SYS_ATA_ALT_OFFSET 0x210 /* alternate register offset */ 93 #define CONFIG_IDE_SWAP_IO 94 95 /* if you use all NOR Flash , you change dip-switch. Please see Manual. */ 96 #define CONFIG_SYS_MAX_FLASH_BANKS 1 97 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE + (0 * AP325RXA_FLASH_BANK_SIZE)} 98 99 /* Timeout for Flash erase operations (in ms) */ 100 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) 101 /* Timeout for Flash write operations (in ms) */ 102 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) 103 /* Timeout for Flash set sector lock bit operations (in ms) */ 104 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) 105 /* Timeout for Flash clear lock bit operations (in ms) */ 106 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) 107 108 /* 109 * Use hardware flash sectors protection instead 110 * of U-Boot software protection 111 */ 112 #undef CONFIG_SYS_FLASH_PROTECTION 113 #undef CONFIG_SYS_DIRECT_FLASH_TFTP 114 115 /* ENV setting */ 116 #define CONFIG_ENV_OVERWRITE 1 117 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 118 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 119 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) 120 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ 121 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) 122 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) 123 124 /* Board Clock */ 125 #define CONFIG_SYS_CLK_FREQ 33333333 126 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 127 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 128 #define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */ 129 130 #endif /* __AP325RXA_H */ 131