1 /* 2 * Configuation settings for the Renesas Solutions AP-325RXA board 3 * 4 * Copyright (C) 2008 Renesas Solutions Corp. 5 * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __AP325RXA_H 11 #define __AP325RXA_H 12 13 #define CONFIG_CPU_SH7723 1 14 #define CONFIG_AP325RXA 1 15 16 #define CONFIG_CMD_SDRAM 17 #define CONFIG_CMD_IDE 18 19 #define CONFIG_BAUDRATE 38400 20 #define CONFIG_BOOTARGS "console=ttySC2,38400" 21 22 #define CONFIG_DISPLAY_BOARDINFO 23 #undef CONFIG_SHOW_BOOT_PROGRESS 24 25 /* SMC9118 */ 26 #define CONFIG_SMC911X 1 27 #define CONFIG_SMC911X_32_BIT 1 28 #define CONFIG_SMC911X_BASE 0xB6080000 29 30 /* MEMORY */ 31 #define AP325RXA_SDRAM_BASE (0x88000000) 32 #define AP325RXA_FLASH_BASE_1 (0xA0000000) 33 #define AP325RXA_FLASH_BANK_SIZE (128 * 1024 * 1024) 34 35 #define CONFIG_SYS_TEXT_BASE 0x8FFC0000 36 37 /* undef to save memory */ 38 #define CONFIG_SYS_LONGHELP 39 /* Monitor Command Prompt */ 40 /* Buffer size for input from the Console */ 41 #define CONFIG_SYS_CBSIZE 256 42 /* Buffer size for Console output */ 43 #define CONFIG_SYS_PBSIZE 256 44 /* max args accepted for monitor commands */ 45 #define CONFIG_SYS_MAXARGS 16 46 /* Buffer size for Boot Arguments passed to kernel */ 47 #define CONFIG_SYS_BARGSIZE 512 48 /* List of legal baudrate settings for this board */ 49 #define CONFIG_SYS_BAUDRATE_TABLE { 38400 } 50 51 /* SCIF */ 52 #define CONFIG_SCIF_CONSOLE 1 53 #define CONFIG_SCIF_A 1 /* SH7723 has SCIF and SCIFA */ 54 #define CONFIG_CONS_SCIF5 1 55 56 /* Suppress display of console information at boot */ 57 58 #define CONFIG_SYS_MEMTEST_START (AP325RXA_SDRAM_BASE) 59 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024)) 60 61 /* Enable alternate, more extensive, memory test */ 62 #undef CONFIG_SYS_ALT_MEMTEST 63 /* Scratch address used by the alternate memory test */ 64 #undef CONFIG_SYS_MEMTEST_SCRATCH 65 66 /* Enable temporary baudrate change while serial download */ 67 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 68 69 #define CONFIG_SYS_SDRAM_BASE (AP325RXA_SDRAM_BASE) 70 /* maybe more, but if so u-boot doesn't know about it... */ 71 #define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) 72 /* default load address for scripts ?!? */ 73 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024) 74 75 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ 76 #define CONFIG_SYS_MONITOR_BASE (AP325RXA_FLASH_BASE_1) 77 /* Monitor size */ 78 #define CONFIG_SYS_MONITOR_LEN (128 * 1024) 79 /* Size of DRAM reserved for malloc() use */ 80 #define CONFIG_SYS_MALLOC_LEN (256 * 1024) 81 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 82 83 /* FLASH */ 84 #define CONFIG_FLASH_CFI_DRIVER 1 85 #define CONFIG_SYS_FLASH_CFI 86 #undef CONFIG_SYS_FLASH_QUIET_TEST 87 /* print 'E' for empty sector on flinfo */ 88 #define CONFIG_SYS_FLASH_EMPTY_INFO 89 /* Physical start address of Flash memory */ 90 #define CONFIG_SYS_FLASH_BASE (AP325RXA_FLASH_BASE_1) 91 /* Max number of sectors on each Flash chip */ 92 #define CONFIG_SYS_MAX_FLASH_SECT 512 93 94 /* 95 * IDE support 96 */ 97 #define CONFIG_IDE_RESET 1 98 #define CONFIG_SYS_PIO_MODE 1 99 #define CONFIG_SYS_IDE_MAXBUS 1 /* IDE bus */ 100 #define CONFIG_SYS_IDE_MAXDEVICE 1 101 #define CONFIG_SYS_ATA_BASE_ADDR 0xB4180000 102 #define CONFIG_SYS_ATA_STRIDE 2 /* 1bit shift */ 103 #define CONFIG_SYS_ATA_DATA_OFFSET 0x200 /* data reg offset */ 104 #define CONFIG_SYS_ATA_REG_OFFSET 0x200 /* reg offset */ 105 #define CONFIG_SYS_ATA_ALT_OFFSET 0x210 /* alternate register offset */ 106 #define CONFIG_IDE_SWAP_IO 107 108 /* if you use all NOR Flash , you change dip-switch. Please see Manual. */ 109 #define CONFIG_SYS_MAX_FLASH_BANKS 1 110 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE + (0 * AP325RXA_FLASH_BANK_SIZE)} 111 112 /* Timeout for Flash erase operations (in ms) */ 113 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) 114 /* Timeout for Flash write operations (in ms) */ 115 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) 116 /* Timeout for Flash set sector lock bit operations (in ms) */ 117 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) 118 /* Timeout for Flash clear lock bit operations (in ms) */ 119 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) 120 121 /* 122 * Use hardware flash sectors protection instead 123 * of U-Boot software protection 124 */ 125 #undef CONFIG_SYS_FLASH_PROTECTION 126 #undef CONFIG_SYS_DIRECT_FLASH_TFTP 127 128 /* ENV setting */ 129 #define CONFIG_ENV_IS_IN_FLASH 130 #define CONFIG_ENV_OVERWRITE 1 131 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 132 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 133 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) 134 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ 135 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) 136 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) 137 138 /* Board Clock */ 139 #define CONFIG_SYS_CLK_FREQ 33333333 140 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 141 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 142 #define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */ 143 144 #endif /* __AP325RXA_H */ 145