1 /* 2 * Configuation settings for the Renesas Solutions AP-325RXA board 3 * 4 * Copyright (C) 2008 Renesas Solutions Corp. 5 * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __AP325RXA_H 11 #define __AP325RXA_H 12 13 #define CONFIG_CPU_SH7723 1 14 #define CONFIG_AP325RXA 1 15 16 #define CONFIG_CMD_SDRAM 17 #define CONFIG_CMD_IDE 18 19 #define CONFIG_BOOTARGS "console=ttySC2,38400" 20 21 #define CONFIG_DISPLAY_BOARDINFO 22 #undef CONFIG_SHOW_BOOT_PROGRESS 23 24 /* SMC9118 */ 25 #define CONFIG_SMC911X 1 26 #define CONFIG_SMC911X_32_BIT 1 27 #define CONFIG_SMC911X_BASE 0xB6080000 28 29 /* MEMORY */ 30 #define AP325RXA_SDRAM_BASE (0x88000000) 31 #define AP325RXA_FLASH_BASE_1 (0xA0000000) 32 #define AP325RXA_FLASH_BANK_SIZE (128 * 1024 * 1024) 33 34 #define CONFIG_SYS_TEXT_BASE 0x8FFC0000 35 36 /* undef to save memory */ 37 #define CONFIG_SYS_LONGHELP 38 /* Monitor Command Prompt */ 39 /* Buffer size for input from the Console */ 40 #define CONFIG_SYS_CBSIZE 256 41 /* Buffer size for Console output */ 42 #define CONFIG_SYS_PBSIZE 256 43 /* max args accepted for monitor commands */ 44 #define CONFIG_SYS_MAXARGS 16 45 /* Buffer size for Boot Arguments passed to kernel */ 46 #define CONFIG_SYS_BARGSIZE 512 47 /* List of legal baudrate settings for this board */ 48 #define CONFIG_SYS_BAUDRATE_TABLE { 38400 } 49 50 /* SCIF */ 51 #define CONFIG_SCIF_CONSOLE 1 52 #define CONFIG_SCIF_A 1 /* SH7723 has SCIF and SCIFA */ 53 #define CONFIG_CONS_SCIF5 1 54 55 /* Suppress display of console information at boot */ 56 57 #define CONFIG_SYS_MEMTEST_START (AP325RXA_SDRAM_BASE) 58 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024)) 59 60 /* Enable alternate, more extensive, memory test */ 61 #undef CONFIG_SYS_ALT_MEMTEST 62 /* Scratch address used by the alternate memory test */ 63 #undef CONFIG_SYS_MEMTEST_SCRATCH 64 65 /* Enable temporary baudrate change while serial download */ 66 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 67 68 #define CONFIG_SYS_SDRAM_BASE (AP325RXA_SDRAM_BASE) 69 /* maybe more, but if so u-boot doesn't know about it... */ 70 #define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) 71 /* default load address for scripts ?!? */ 72 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024) 73 74 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ 75 #define CONFIG_SYS_MONITOR_BASE (AP325RXA_FLASH_BASE_1) 76 /* Monitor size */ 77 #define CONFIG_SYS_MONITOR_LEN (128 * 1024) 78 /* Size of DRAM reserved for malloc() use */ 79 #define CONFIG_SYS_MALLOC_LEN (256 * 1024) 80 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 81 82 /* FLASH */ 83 #define CONFIG_FLASH_CFI_DRIVER 1 84 #define CONFIG_SYS_FLASH_CFI 85 #undef CONFIG_SYS_FLASH_QUIET_TEST 86 /* print 'E' for empty sector on flinfo */ 87 #define CONFIG_SYS_FLASH_EMPTY_INFO 88 /* Physical start address of Flash memory */ 89 #define CONFIG_SYS_FLASH_BASE (AP325RXA_FLASH_BASE_1) 90 /* Max number of sectors on each Flash chip */ 91 #define CONFIG_SYS_MAX_FLASH_SECT 512 92 93 /* 94 * IDE support 95 */ 96 #define CONFIG_IDE_RESET 1 97 #define CONFIG_SYS_PIO_MODE 1 98 #define CONFIG_SYS_IDE_MAXBUS 1 /* IDE bus */ 99 #define CONFIG_SYS_IDE_MAXDEVICE 1 100 #define CONFIG_SYS_ATA_BASE_ADDR 0xB4180000 101 #define CONFIG_SYS_ATA_STRIDE 2 /* 1bit shift */ 102 #define CONFIG_SYS_ATA_DATA_OFFSET 0x200 /* data reg offset */ 103 #define CONFIG_SYS_ATA_REG_OFFSET 0x200 /* reg offset */ 104 #define CONFIG_SYS_ATA_ALT_OFFSET 0x210 /* alternate register offset */ 105 #define CONFIG_IDE_SWAP_IO 106 107 /* if you use all NOR Flash , you change dip-switch. Please see Manual. */ 108 #define CONFIG_SYS_MAX_FLASH_BANKS 1 109 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE + (0 * AP325RXA_FLASH_BANK_SIZE)} 110 111 /* Timeout for Flash erase operations (in ms) */ 112 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) 113 /* Timeout for Flash write operations (in ms) */ 114 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) 115 /* Timeout for Flash set sector lock bit operations (in ms) */ 116 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) 117 /* Timeout for Flash clear lock bit operations (in ms) */ 118 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) 119 120 /* 121 * Use hardware flash sectors protection instead 122 * of U-Boot software protection 123 */ 124 #undef CONFIG_SYS_FLASH_PROTECTION 125 #undef CONFIG_SYS_DIRECT_FLASH_TFTP 126 127 /* ENV setting */ 128 #define CONFIG_ENV_IS_IN_FLASH 129 #define CONFIG_ENV_OVERWRITE 1 130 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 131 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 132 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) 133 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ 134 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) 135 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) 136 137 /* Board Clock */ 138 #define CONFIG_SYS_CLK_FREQ 33333333 139 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 140 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 141 #define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */ 142 143 #endif /* __AP325RXA_H */ 144