1 /* 2 * Configuation settings for the Renesas Solutions AP-325RXA board 3 * 4 * Copyright (C) 2008 Renesas Solutions Corp. 5 * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __AP325RXA_H 11 #define __AP325RXA_H 12 13 #define CONFIG_CPU_SH7723 1 14 #define CONFIG_AP325RXA 1 15 16 #define CONFIG_BOOTARGS "console=ttySC2,38400" 17 18 #define CONFIG_DISPLAY_BOARDINFO 19 #undef CONFIG_SHOW_BOOT_PROGRESS 20 21 /* SMC9118 */ 22 #define CONFIG_SMC911X 1 23 #define CONFIG_SMC911X_32_BIT 1 24 #define CONFIG_SMC911X_BASE 0xB6080000 25 26 /* MEMORY */ 27 #define AP325RXA_SDRAM_BASE (0x88000000) 28 #define AP325RXA_FLASH_BASE_1 (0xA0000000) 29 #define AP325RXA_FLASH_BANK_SIZE (128 * 1024 * 1024) 30 31 #define CONFIG_SYS_TEXT_BASE 0x8FFC0000 32 33 /* undef to save memory */ 34 #define CONFIG_SYS_LONGHELP 35 /* Monitor Command Prompt */ 36 /* Buffer size for input from the Console */ 37 #define CONFIG_SYS_CBSIZE 256 38 /* Buffer size for Console output */ 39 #define CONFIG_SYS_PBSIZE 256 40 /* max args accepted for monitor commands */ 41 #define CONFIG_SYS_MAXARGS 16 42 /* Buffer size for Boot Arguments passed to kernel */ 43 #define CONFIG_SYS_BARGSIZE 512 44 /* List of legal baudrate settings for this board */ 45 #define CONFIG_SYS_BAUDRATE_TABLE { 38400 } 46 47 /* SCIF */ 48 #define CONFIG_SCIF_A 1 /* SH7723 has SCIF and SCIFA */ 49 #define CONFIG_CONS_SCIF5 1 50 51 /* Suppress display of console information at boot */ 52 53 #define CONFIG_SYS_MEMTEST_START (AP325RXA_SDRAM_BASE) 54 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024)) 55 56 /* Enable alternate, more extensive, memory test */ 57 #undef CONFIG_SYS_ALT_MEMTEST 58 /* Scratch address used by the alternate memory test */ 59 #undef CONFIG_SYS_MEMTEST_SCRATCH 60 61 /* Enable temporary baudrate change while serial download */ 62 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 63 64 #define CONFIG_SYS_SDRAM_BASE (AP325RXA_SDRAM_BASE) 65 /* maybe more, but if so u-boot doesn't know about it... */ 66 #define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) 67 /* default load address for scripts ?!? */ 68 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024) 69 70 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ 71 #define CONFIG_SYS_MONITOR_BASE (AP325RXA_FLASH_BASE_1) 72 /* Monitor size */ 73 #define CONFIG_SYS_MONITOR_LEN (128 * 1024) 74 /* Size of DRAM reserved for malloc() use */ 75 #define CONFIG_SYS_MALLOC_LEN (256 * 1024) 76 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 77 78 /* FLASH */ 79 #define CONFIG_FLASH_CFI_DRIVER 1 80 #define CONFIG_SYS_FLASH_CFI 81 #undef CONFIG_SYS_FLASH_QUIET_TEST 82 /* print 'E' for empty sector on flinfo */ 83 #define CONFIG_SYS_FLASH_EMPTY_INFO 84 /* Physical start address of Flash memory */ 85 #define CONFIG_SYS_FLASH_BASE (AP325RXA_FLASH_BASE_1) 86 /* Max number of sectors on each Flash chip */ 87 #define CONFIG_SYS_MAX_FLASH_SECT 512 88 89 /* 90 * IDE support 91 */ 92 #define CONFIG_IDE_RESET 1 93 #define CONFIG_SYS_PIO_MODE 1 94 #define CONFIG_SYS_IDE_MAXBUS 1 /* IDE bus */ 95 #define CONFIG_SYS_IDE_MAXDEVICE 1 96 #define CONFIG_SYS_ATA_BASE_ADDR 0xB4180000 97 #define CONFIG_SYS_ATA_STRIDE 2 /* 1bit shift */ 98 #define CONFIG_SYS_ATA_DATA_OFFSET 0x200 /* data reg offset */ 99 #define CONFIG_SYS_ATA_REG_OFFSET 0x200 /* reg offset */ 100 #define CONFIG_SYS_ATA_ALT_OFFSET 0x210 /* alternate register offset */ 101 #define CONFIG_IDE_SWAP_IO 102 103 /* if you use all NOR Flash , you change dip-switch. Please see Manual. */ 104 #define CONFIG_SYS_MAX_FLASH_BANKS 1 105 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE + (0 * AP325RXA_FLASH_BANK_SIZE)} 106 107 /* Timeout for Flash erase operations (in ms) */ 108 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) 109 /* Timeout for Flash write operations (in ms) */ 110 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) 111 /* Timeout for Flash set sector lock bit operations (in ms) */ 112 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) 113 /* Timeout for Flash clear lock bit operations (in ms) */ 114 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) 115 116 /* 117 * Use hardware flash sectors protection instead 118 * of U-Boot software protection 119 */ 120 #undef CONFIG_SYS_FLASH_PROTECTION 121 #undef CONFIG_SYS_DIRECT_FLASH_TFTP 122 123 /* ENV setting */ 124 #define CONFIG_ENV_OVERWRITE 1 125 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 126 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 127 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) 128 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ 129 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) 130 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) 131 132 /* Board Clock */ 133 #define CONFIG_SYS_CLK_FREQ 33333333 134 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 135 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 136 #define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */ 137 138 #endif /* __AP325RXA_H */ 139