xref: /openbmc/u-boot/include/configs/amcore.h (revision ba10b852)
1 /*
2  * Sysam AMCORE board configuration
3  *
4  * (C) Copyright 2015  Angelo Dureghello <angelo@sysam.it>
5  *
6  * SPDX-License-Identifier:     GPL-2.0+
7  */
8 
9 #ifndef __AMCORE_CONFIG_H
10 #define __AMCORE_CONFIG_H
11 
12 #define CONFIG_AMCORE
13 #define CONFIG_HOSTNAME			AMCORE
14 
15 #define CONFIG_MCFTMR
16 #define CONFIG_MCFUART
17 #define CONFIG_SYS_UART_PORT		0
18 #define CONFIG_BAUDRATE			115200
19 #define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
20 
21 #define CONFIG_BOOTDELAY		1
22 #define CONFIG_BOOTCOMMAND		"bootm ffc20000"
23 
24 #undef CONFIG_CMD_AES
25 #define CONFIG_CMD_CACHE
26 #define CONFIG_CMD_TIMER
27 #define CONFIG_CMD_DIAG
28 
29 /* undef to save memory	*/
30 #undef	CONFIG_SYS_LONGHELP
31 
32 #if defined(CONFIG_CMD_KGDB)
33 /* Console I/O buff. size */
34 #define CONFIG_SYS_CBSIZE		1024
35 #else
36 #define CONFIG_SYS_CBSIZE		256
37 #endif
38 /* Print buffer size */
39 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
40 					 sizeof(CONFIG_SYS_PROMPT)+16)
41 /* max number of command args	*/
42 #define CONFIG_SYS_MAXARGS		16
43 /* Boot argument buffer size	*/
44 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
45 
46 #define CONFIG_SYS_CONSOLE_INFO_QUIET	1 /* no console @ startup	*/
47 #define CONFIG_AUTO_COMPLETE		1 /* add autocompletion support	*/
48 #define CONFIG_LOOPW			1 /* enable loopw command	*/
49 #define CONFIG_MX_CYCLIC		1 /* enable mdc/mwc commands	*/
50 
51 #define CONFIG_SYS_LOAD_ADDR		0x20000	/* default load address */
52 
53 #define CONFIG_SYS_MEMTEST_START	0x0
54 #define CONFIG_SYS_MEMTEST_END		0x1000000
55 
56 #define CONFIG_SYS_HZ			1000
57 
58 #define CONFIG_SYS_CLK			45000000
59 #define CONFIG_SYS_CPU_CLK		(CONFIG_SYS_CLK * 2)
60 /* Register Base Addrs */
61 #define CONFIG_SYS_MBAR			0x10000000
62 /* Definitions for initial stack pointer and data area (in DPRAM) */
63 #define CONFIG_SYS_INIT_RAM_ADDR	0x20000000
64 /* size of internal SRAM */
65 #define CONFIG_SYS_INIT_RAM_SIZE	0x1000
66 #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - \
67 					 GENERATED_GBL_DATA_SIZE)
68 #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
69 
70 #define CONFIG_SYS_SDRAM_BASE		0x00000000
71 #define CONFIG_SYS_SDRAM_SIZE		0x1000000
72 #define CONFIG_SYS_FLASH_BASE		0xffc00000
73 #define CONFIG_SYS_MAX_FLASH_BANKS	1
74 #define CONFIG_SYS_MAX_FLASH_SECT	1024
75 #define CONFIG_SYS_FLASH_ERASE_TOUT	1000
76 
77 #define CONFIG_SYS_FLASH_CFI
78 #define CONFIG_FLASH_CFI_DRIVER
79 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
80 /* amcore design has flash data bytes wired swapped */
81 #define CONFIG_SYS_WRITE_SWAPPED_DATA
82 /* reserve 128-4KB */
83 #define CONFIG_SYS_MONITOR_BASE		(CONFIG_SYS_FLASH_BASE + 0x400)
84 #define CONFIG_SYS_MONITOR_LEN          ((128 - 4) * 1024)
85 #define CONFIG_SYS_MALLOC_LEN		(1 * 1024 * 1024)
86 #define CONFIG_SYS_BOOTPARAMS_LEN	(64 * 1024)
87 
88 #define CONFIG_ENV_IS_IN_FLASH		1
89 #define CONFIG_ENV_ADDR			(CONFIG_SYS_FLASH_BASE + \
90 					 CONFIG_SYS_MONITOR_LEN)
91 #define CONFIG_ENV_SIZE			0x1000
92 #define CONFIG_ENV_SECT_SIZE		0x1000
93 
94 #define LDS_BOARD_TEXT \
95         . = DEFINED(env_offset) ? env_offset : .; \
96         common/env_embedded.o (.text*);
97 
98 /* memory map space for linux boot data */
99 #define CONFIG_SYS_BOOTMAPSZ		(8 << 20)
100 
101 /*
102  * Cache Configuration
103  *
104  * Special 8K version 3 core cache.
105  * This is a single unified instruction/data cache.
106  * sdram - single region - no masks
107  */
108 #define CONFIG_SYS_CACHELINE_SIZE	16
109 
110 #define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
111 					 CONFIG_SYS_INIT_RAM_SIZE - 8)
112 #define DCACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
113 					 CONFIG_SYS_INIT_RAM_SIZE - 4)
114 #define CONFIG_SYS_ICACHE_INV           (CF_CACR_CINVA)
115 #define CONFIG_SYS_CACHE_ACR0		(CF_ACR_CM_WT | CF_ACR_SM_ALL | \
116 					 CF_ACR_EN)
117 #define CONFIG_SYS_CACHE_ICACR		(CF_CACR_DCM_P | CF_CACR_ESB | \
118 					 CF_CACR_EC)
119 
120 /* CS0 - AMD Flash, address 0xffc00000 */
121 #define	CONFIG_SYS_CS0_BASE		(CONFIG_SYS_FLASH_BASE>>16)
122 /* 4MB, AA=0,V=1  C/I BIT for errata */
123 #define	CONFIG_SYS_CS0_MASK		0x003f0001
124 /* WS=10, AA=1, PS=16bit (10) */
125 #define	CONFIG_SYS_CS0_CTRL		0x1980
126 /* CS1 - DM9000 Ethernet Controller, address 0x30000000 */
127 #define CONFIG_SYS_CS1_BASE		0x3000
128 #define CONFIG_SYS_CS1_MASK		0x00070001
129 #define CONFIG_SYS_CS1_CTRL		0x0100
130 
131 #endif  /* __AMCORE_CONFIG_H */
132 
133