xref: /openbmc/u-boot/include/configs/am43xx_evm.h (revision c2012cb4)
1 /*
2  * am43xx_evm.h
3  *
4  * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __CONFIG_AM43XX_EVM_H
10 #define __CONFIG_AM43XX_EVM_H
11 
12 #define CONFIG_ARCH_CPU_INIT
13 #define CONFIG_MAX_RAM_BANK_SIZE	(1024 << 21)	/* 2GB */
14 #define CONFIG_SYS_TIMERBASE		0x48040000	/* Use Timer2 */
15 
16 #include <asm/arch/omap.h>
17 
18 /* NS16550 Configuration */
19 #define CONFIG_SYS_NS16550_CLK		48000000
20 #if !defined(CONFIG_SPL_DM) || !defined(CONFIG_DM_SERIAL)
21 #define CONFIG_SYS_NS16550_REG_SIZE    (-4)
22 #define CONFIG_SYS_NS16550_SERIAL
23 #endif
24 
25 /* I2C Configuration */
26 #define CONFIG_ENV_EEPROM_IS_ON_I2C
27 #define CONFIG_SYS_I2C_EEPROM_ADDR	0x50	/* Main EEPROM */
28 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	2
29 
30 /* Power */
31 #define CONFIG_POWER
32 #define CONFIG_POWER_I2C
33 #define CONFIG_POWER_TPS65218
34 #define CONFIG_POWER_TPS62362
35 
36 /* SPL defines. */
37 #define CONFIG_SPL_TEXT_BASE		CONFIG_ISW_ENTRY_ADDR
38 #define CONFIG_SYS_SPL_ARGS_ADDR	(CONFIG_SYS_SDRAM_BASE + \
39 					 (128 << 20))
40 
41 /* Enabling L2 Cache */
42 #define CONFIG_SYS_L2_PL310
43 #define CONFIG_SYS_PL310_BASE	0x48242000
44 
45 /*
46  * Since SPL did pll and ddr initialization for us,
47  * we don't need to do it twice.
48  */
49 #if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_QSPI_BOOT)
50 #define CONFIG_SKIP_LOWLEVEL_INIT
51 #endif
52 
53 /*
54  * When building U-Boot such that there is no previous loader
55  * we need to call board_early_init_f.  This is taken care of in
56  * s_init when we have SPL used.
57  */
58 
59 /* Now bring in the rest of the common code. */
60 #include <configs/ti_armv7_omap.h>
61 
62 /* Always 64 KiB env size */
63 #define CONFIG_ENV_SIZE			(64 << 10)
64 
65 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
66 
67 /* Clock Defines */
68 #define V_OSCK				24000000  /* Clock output from T2 */
69 #define V_SCLK				(V_OSCK)
70 
71 /* NS16550 Configuration */
72 #define CONFIG_SYS_NS16550_COM1		0x44e09000	/* Base EVM has UART0 */
73 
74 #define FAT_ENV_INTERFACE		"mmc"
75 #define FAT_ENV_DEVICE_AND_PART		"0:1"
76 #define FAT_ENV_FILE			"uboot.env"
77 
78 #define CONFIG_SPL_LDSCRIPT		"arch/arm/mach-omap2/u-boot-spl.lds"
79 
80 /* SPL USB Support */
81 
82 #if defined(CONFIG_SPL_USB_HOST_SUPPORT) || !defined(CONFIG_SPL_BUILD)
83 #define CONFIG_SYS_USB_FAT_BOOT_PARTITION		1
84 #define CONFIG_USB_XHCI_OMAP
85 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
86 
87 #define CONFIG_OMAP_USB_PHY
88 #define CONFIG_AM437X_USB2PHY2_HOST
89 #endif
90 
91 #if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_USBETH_SUPPORT)
92 #undef CONFIG_USB_DWC3_PHY_OMAP
93 #undef CONFIG_USB_DWC3_OMAP
94 #undef CONFIG_USB_DWC3
95 #undef CONFIG_USB_DWC3_GADGET
96 
97 #undef CONFIG_USB_GADGET_DOWNLOAD
98 #undef CONFIG_USB_GADGET_VBUS_DRAW
99 #undef CONFIG_G_DNL_MANUFACTURER
100 #undef CONFIG_G_DNL_VENDOR_NUM
101 #undef CONFIG_G_DNL_PRODUCT_NUM
102 #undef CONFIG_USB_GADGET_DUALSPEED
103 #endif
104 
105 /*
106  * Disable MMC DM for SPL build and can be re-enabled after adding
107  * DM support in SPL
108  */
109 #ifdef CONFIG_SPL_BUILD
110 #undef CONFIG_TIMER
111 #endif
112 
113 #ifndef CONFIG_SPL_BUILD
114 /* USB Device Firmware Update support */
115 #define DFUARGS \
116 	"dfu_bufsiz=0x10000\0" \
117 	DFU_ALT_INFO_MMC \
118 	DFU_ALT_INFO_EMMC \
119 	DFU_ALT_INFO_RAM \
120 	DFU_ALT_INFO_QSPI_XIP
121 #else
122 #define DFUARGS
123 #endif
124 
125 #ifdef CONFIG_QSPI_BOOT
126 #ifndef CONFIG_SYS_TEXT_BASE
127 #define CONFIG_SYS_TEXT_BASE		CONFIG_ISW_ENTRY_ADDR
128 #endif
129 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
130 #define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
131 #define CONFIG_ENV_SECT_SIZE           (64 << 10) /* 64 KB sectors */
132 #define CONFIG_ENV_OFFSET              0x110000
133 #define CONFIG_ENV_OFFSET_REDUND       0x120000
134 #ifdef MTDIDS_DEFAULT
135 #undef MTDIDS_DEFAULT
136 #endif
137 #ifdef MTDPARTS_DEFAULT
138 #undef MTDPARTS_DEFAULT
139 #endif
140 #define MTDPARTS_DEFAULT		"mtdparts=qspi.0:512k(QSPI.u-boot)," \
141 					"512k(QSPI.u-boot.backup)," \
142 					"512k(QSPI.u-boot-spl-os)," \
143 					"64k(QSPI.u-boot-env)," \
144 					"64k(QSPI.u-boot-env.backup)," \
145 					"8m(QSPI.kernel)," \
146 					"-(QSPI.file-system)"
147 #endif
148 
149 /* SPI */
150 #undef CONFIG_OMAP3_SPI
151 #define CONFIG_TI_SPI_MMAP
152 #define CONFIG_QSPI_SEL_GPIO                   48
153 #define CONFIG_SF_DEFAULT_SPEED                48000000
154 #define CONFIG_SF_DEFAULT_MODE                 SPI_MODE_3
155 #define CONFIG_QSPI_QUAD_SUPPORT
156 #define CONFIG_TI_EDMA3
157 
158 #ifndef CONFIG_SPL_BUILD
159 #include <environment/ti/dfu.h>
160 #include <environment/ti/mmc.h>
161 
162 #define CONFIG_EXTRA_ENV_SETTINGS \
163 	DEFAULT_LINUX_BOOT_ENV \
164 	DEFAULT_MMC_TI_ARGS \
165 	DEFAULT_FIT_TI_ARGS \
166 	"fdtfile=undefined\0" \
167 	"bootpart=0:2\0" \
168 	"bootdir=/boot\0" \
169 	"bootfile=zImage\0" \
170 	"console=ttyO0,115200n8\0" \
171 	"partitions=" \
172 		"uuid_disk=${uuid_gpt_disk};" \
173 		"name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}\0" \
174 	"optargs=\0" \
175 	"usbroot=/dev/sda2 rw\0" \
176 	"usbrootfstype=ext4 rootwait\0" \
177 	"usbdev=0\0" \
178 	"ramroot=/dev/ram0 rw\0" \
179 	"ramrootfstype=ext2\0" \
180 	"usbargs=setenv bootargs console=${console} " \
181 		"${optargs} " \
182 		"root=${usbroot} " \
183 		"rootfstype=${usbrootfstype}\0" \
184 	"ramargs=setenv bootargs console=${console} " \
185 		"${optargs} " \
186 		"root=${ramroot} " \
187 		"rootfstype=${ramrootfstype}\0" \
188 	"loadramdisk=load ${devtype} ${devnum} ${rdaddr} ramdisk.gz\0" \
189 	"usbboot=" \
190 		"setenv devnum ${usbdev}; " \
191 		"setenv devtype usb; " \
192 		"usb start ${usbdev}; " \
193 		"if usb dev ${usbdev}; then " \
194 			"if run loadbootenv; then " \
195 				"echo Loaded environment from ${bootenv};" \
196 				"run importbootenv;" \
197 			"fi;" \
198 			"if test -n $uenvcmd; then " \
199 				"echo Running uenvcmd ...;" \
200 				"run uenvcmd;" \
201 			"fi;" \
202 			"if run loadimage; then " \
203 				"run loadfdt; " \
204 				"echo Booting from usb ${usbdev}...; " \
205 				"run usbargs;" \
206 				"bootz ${loadaddr} - ${fdtaddr}; " \
207 			"fi;" \
208 		"fi\0" \
209 		"fi;" \
210 		"usb stop ${usbdev};\0" \
211 	"findfdt="\
212 		"if test $board_name = AM43EPOS; then " \
213 			"setenv fdtfile am43x-epos-evm.dtb; fi; " \
214 		"if test $board_name = AM43__GP; then " \
215 			"setenv fdtfile am437x-gp-evm.dtb; fi; " \
216 		"if test $board_name = AM43XXHS; then " \
217 			"setenv fdtfile am437x-gp-evm.dtb; fi; " \
218 		"if test $board_name = AM43__SK; then " \
219 			"setenv fdtfile am437x-sk-evm.dtb; fi; " \
220 		"if test $board_name = AM43_IDK; then " \
221 			"setenv fdtfile am437x-idk-evm.dtb; fi; " \
222 		"if test $fdtfile = undefined; then " \
223 			"echo WARNING: Could not determine device tree; fi; \0" \
224 	NANDARGS \
225 	NETARGS \
226 	DFUARGS \
227 
228 #define CONFIG_BOOTCOMMAND \
229 	"if test ${boot_fit} -eq 1; then "	\
230 		"run update_to_fit;"	\
231 	"fi;"	\
232 	"run findfdt; " \
233 	"run envboot;" \
234 	"run mmcboot;" \
235 	"run usbboot;" \
236 	NANDBOOT \
237 
238 #endif
239 
240 #ifndef CONFIG_SPL_BUILD
241 /* CPSW Ethernet */
242 #define CONFIG_MII
243 #define CONFIG_BOOTP_DEFAULT
244 #define CONFIG_BOOTP_DNS
245 #define CONFIG_BOOTP_DNS2
246 #define CONFIG_BOOTP_SEND_HOSTNAME
247 #define CONFIG_BOOTP_GATEWAY
248 #define CONFIG_BOOTP_SUBNETMASK
249 #define CONFIG_NET_RETRY_COUNT		10
250 #define CONFIG_PHY_GIGE
251 #endif
252 
253 #define CONFIG_DRIVER_TI_CPSW
254 #define CONFIG_PHYLIB
255 #define PHY_ANEG_TIMEOUT	8000 /* PHY needs longer aneg time at 1G */
256 
257 #define CONFIG_SYS_RX_ETH_BUFFER	64
258 
259 /* NAND support */
260 #ifdef CONFIG_NAND
261 /* NAND: device related configs */
262 #define CONFIG_SYS_NAND_PAGE_SIZE	4096
263 #define CONFIG_SYS_NAND_OOBSIZE		224
264 #define CONFIG_SYS_NAND_BLOCK_SIZE	(256*1024)
265 #define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
266 					 CONFIG_SYS_NAND_PAGE_SIZE)
267 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
268 /* NAND: driver related configs */
269 #define CONFIG_NAND_OMAP_GPMC
270 #define CONFIG_NAND_OMAP_ELM
271 #define CONFIG_SYS_NAND_ONFI_DETECTION
272 #define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_BCH16_CODE_HW
273 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
274 #define CONFIG_SYS_NAND_ECCPOS	{ 2, 3, 4, 5, 6, 7, 8, 9, \
275 				10, 11, 12, 13, 14, 15, 16, 17, 18, 19, \
276 				20, 21, 22, 23, 24, 25, 26, 27, 28, 29, \
277 				30, 31, 32, 33, 34, 35, 36, 37, 38, 39, \
278 				40, 41, 42, 43, 44, 45, 46, 47, 48, 49, \
279 				50, 51, 52, 53, 54, 55, 56, 57, 58, 59, \
280 				60, 61, 62, 63, 64, 65, 66, 67, 68, 69, \
281 				70, 71, 72, 73, 74, 75, 76, 77, 78, 79, \
282 				80, 81, 82, 83, 84, 85, 86, 87, 88, 89, \
283 				90, 91, 92, 93, 94, 95, 96, 97, 98, 99, \
284 			100, 101, 102, 103, 104, 105, 106, 107, 108, 109, \
285 			110, 111, 112, 113, 114, 115, 116, 117, 118, 119, \
286 			120, 121, 122, 123, 124, 125, 126, 127, 128, 129, \
287 			130, 131, 132, 133, 134, 135, 136, 137, 138, 139, \
288 			140, 141, 142, 143, 144, 145, 146, 147, 148, 149, \
289 			150, 151, 152, 153, 154, 155, 156, 157, 158, 159, \
290 			160, 161, 162, 163, 164, 165, 166, 167, 168, 169, \
291 			170, 171, 172, 173, 174, 175, 176, 177, 178, 179, \
292 			180, 181, 182, 183, 184, 185, 186, 187, 188, 189, \
293 			190, 191, 192, 193, 194, 195, 196, 197, 198, 199, \
294 			200, 201, 202, 203, 204, 205, 206, 207, 208, 209, \
295 			}
296 #define CONFIG_SYS_NAND_ECCSIZE		512
297 #define CONFIG_SYS_NAND_ECCBYTES	26
298 #define MTDIDS_DEFAULT			"nand0=nand.0"
299 #define MTDPARTS_DEFAULT		"mtdparts=nand.0:" \
300 					"256k(NAND.SPL)," \
301 					"256k(NAND.SPL.backup1)," \
302 					"256k(NAND.SPL.backup2)," \
303 					"256k(NAND.SPL.backup3)," \
304 					"512k(NAND.u-boot-spl-os)," \
305 					"1m(NAND.u-boot)," \
306 					"256k(NAND.u-boot-env)," \
307 					"256k(NAND.u-boot-env.backup1)," \
308 					"7m(NAND.kernel)," \
309 					"-(NAND.file-system)"
310 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x00180000
311 /* NAND: SPL related configs */
312 #ifdef CONFIG_SPL_NAND_SUPPORT
313 #define CONFIG_SPL_NAND_AM33XX_BCH
314 #endif
315 /* NAND: SPL falcon mode configs */
316 #ifdef CONFIG_SPL_OS_BOOT
317 #define CONFIG_CMD_SPL_NAND_OFS		0x00100000 /* os parameters */
318 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	0x00300000 /* kernel offset */
319 #define CONFIG_CMD_SPL_WRITE_SIZE	CONFIG_SYS_NAND_BLOCK_SIZE
320 #endif
321 #define NANDARGS \
322 	"mtdids=" MTDIDS_DEFAULT "\0" \
323 	"mtdparts=" MTDPARTS_DEFAULT "\0" \
324 	"nandargs=setenv bootargs console=${console} " \
325 		"${optargs} " \
326 		"root=${nandroot} " \
327 		"rootfstype=${nandrootfstype}\0" \
328 	"nandroot=ubi0:rootfs rw ubi.mtd=NAND.file-system,4096\0" \
329 	"nandrootfstype=ubifs rootwait=1\0" \
330 	"nandboot=echo Booting from nand ...; " \
331 		"run nandargs; " \
332 		"nand read ${fdtaddr} NAND.u-boot-spl-os; " \
333 		"nand read ${loadaddr} NAND.kernel; " \
334 		"bootz ${loadaddr} - ${fdtaddr}\0"
335 #define NANDBOOT			"run nandboot; "
336 #else /* !CONFIG_NAND */
337 #define NANDARGS
338 #define NANDBOOT
339 #endif /* CONFIG_NAND */
340 
341 #endif	/* __CONFIG_AM43XX_EVM_H */
342