1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * am43xx_evm.h 4 * 5 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ 6 */ 7 8 #ifndef __CONFIG_AM43XX_EVM_H 9 #define __CONFIG_AM43XX_EVM_H 10 11 #define CONFIG_ARCH_CPU_INIT 12 #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 21) /* 2GB */ 13 #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ 14 15 #include <asm/arch/omap.h> 16 17 /* NS16550 Configuration */ 18 #define CONFIG_SYS_NS16550_CLK 48000000 19 #if !defined(CONFIG_SPL_DM) || !defined(CONFIG_DM_SERIAL) 20 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 21 #define CONFIG_SYS_NS16550_SERIAL 22 #endif 23 24 /* I2C Configuration */ 25 #define CONFIG_ENV_EEPROM_IS_ON_I2C 26 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */ 27 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 28 29 /* Power */ 30 #define CONFIG_POWER 31 #define CONFIG_POWER_I2C 32 #define CONFIG_POWER_TPS65218 33 #define CONFIG_POWER_TPS62362 34 35 /* SPL defines. */ 36 #define CONFIG_SPL_TEXT_BASE CONFIG_ISW_ENTRY_ADDR 37 #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \ 38 (128 << 20)) 39 40 /* Enabling L2 Cache */ 41 #define CONFIG_SYS_L2_PL310 42 #define CONFIG_SYS_PL310_BASE 0x48242000 43 44 /* 45 * Since SPL did pll and ddr initialization for us, 46 * we don't need to do it twice. 47 */ 48 #if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_QSPI_BOOT) 49 #define CONFIG_SKIP_LOWLEVEL_INIT 50 #endif 51 52 /* 53 * When building U-Boot such that there is no previous loader 54 * we need to call board_early_init_f. This is taken care of in 55 * s_init when we have SPL used. 56 */ 57 58 /* Now bring in the rest of the common code. */ 59 #include <configs/ti_armv7_omap.h> 60 61 /* Always 64 KiB env size */ 62 #define CONFIG_ENV_SIZE (64 << 10) 63 64 /* Clock Defines */ 65 #define V_OSCK 24000000 /* Clock output from T2 */ 66 #define V_SCLK (V_OSCK) 67 68 /* NS16550 Configuration */ 69 #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ 70 71 /* SPL USB Support */ 72 73 #if defined(CONFIG_SPL_USB_HOST_SUPPORT) || !defined(CONFIG_SPL_BUILD) 74 #define CONFIG_SYS_USB_FAT_BOOT_PARTITION 1 75 #define CONFIG_USB_XHCI_OMAP 76 77 #define CONFIG_AM437X_USB2PHY2_HOST 78 #endif 79 80 #if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_USB_ETHER) 81 #undef CONFIG_USB_DWC3_PHY_OMAP 82 #undef CONFIG_USB_DWC3_OMAP 83 #undef CONFIG_USB_DWC3 84 #undef CONFIG_USB_DWC3_GADGET 85 86 #undef CONFIG_USB_GADGET_DOWNLOAD 87 #undef CONFIG_USB_GADGET_VBUS_DRAW 88 #undef CONFIG_USB_GADGET_MANUFACTURER 89 #undef CONFIG_USB_GADGET_VENDOR_NUM 90 #undef CONFIG_USB_GADGET_PRODUCT_NUM 91 #undef CONFIG_USB_GADGET_DUALSPEED 92 #endif 93 94 /* 95 * Disable MMC DM for SPL build and can be re-enabled after adding 96 * DM support in SPL 97 */ 98 #ifdef CONFIG_SPL_BUILD 99 #undef CONFIG_TIMER 100 #endif 101 102 #ifndef CONFIG_SPL_BUILD 103 /* USB Device Firmware Update support */ 104 #define DFUARGS \ 105 "dfu_bufsiz=0x10000\0" \ 106 DFU_ALT_INFO_MMC \ 107 DFU_ALT_INFO_EMMC \ 108 DFU_ALT_INFO_RAM \ 109 DFU_ALT_INFO_QSPI_XIP 110 #else 111 #define DFUARGS 112 #endif 113 114 #ifdef CONFIG_QSPI_BOOT 115 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT 116 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 117 #define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64 KB sectors */ 118 #define CONFIG_ENV_OFFSET 0x110000 119 #define CONFIG_ENV_OFFSET_REDUND 0x120000 120 #endif 121 122 /* SPI */ 123 #define CONFIG_TI_SPI_MMAP 124 #define CONFIG_QSPI_SEL_GPIO 48 125 #define CONFIG_SF_DEFAULT_SPEED 48000000 126 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 127 #define CONFIG_QSPI_QUAD_SUPPORT 128 #define CONFIG_TI_EDMA3 129 130 #ifndef CONFIG_SPL_BUILD 131 #include <environment/ti/dfu.h> 132 #include <environment/ti/mmc.h> 133 134 #define CONFIG_EXTRA_ENV_SETTINGS \ 135 DEFAULT_LINUX_BOOT_ENV \ 136 DEFAULT_MMC_TI_ARGS \ 137 DEFAULT_FIT_TI_ARGS \ 138 "fdtfile=undefined\0" \ 139 "bootpart=0:2\0" \ 140 "bootdir=/boot\0" \ 141 "bootfile=zImage\0" \ 142 "console=ttyO0,115200n8\0" \ 143 "partitions=" \ 144 "uuid_disk=${uuid_gpt_disk};" \ 145 "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}\0" \ 146 "optargs=\0" \ 147 "usbroot=/dev/sda2 rw\0" \ 148 "usbrootfstype=ext4 rootwait\0" \ 149 "usbdev=0\0" \ 150 "ramroot=/dev/ram0 rw\0" \ 151 "ramrootfstype=ext2\0" \ 152 "usbargs=setenv bootargs console=${console} " \ 153 "${optargs} " \ 154 "root=${usbroot} " \ 155 "rootfstype=${usbrootfstype}\0" \ 156 "ramargs=setenv bootargs console=${console} " \ 157 "${optargs} " \ 158 "root=${ramroot} " \ 159 "rootfstype=${ramrootfstype}\0" \ 160 "loadramdisk=load ${devtype} ${devnum} ${rdaddr} ramdisk.gz\0" \ 161 "usbboot=" \ 162 "setenv devnum ${usbdev}; " \ 163 "setenv devtype usb; " \ 164 "usb start ${usbdev}; " \ 165 "if usb dev ${usbdev}; then " \ 166 "if run loadbootenv; then " \ 167 "echo Loaded environment from ${bootenv};" \ 168 "run importbootenv;" \ 169 "fi;" \ 170 "if test -n $uenvcmd; then " \ 171 "echo Running uenvcmd ...;" \ 172 "run uenvcmd;" \ 173 "fi;" \ 174 "if run loadimage; then " \ 175 "run loadfdt; " \ 176 "echo Booting from usb ${usbdev}...; " \ 177 "run usbargs;" \ 178 "bootz ${loadaddr} - ${fdtaddr}; " \ 179 "fi;" \ 180 "fi\0" \ 181 "fi;" \ 182 "usb stop ${usbdev};\0" \ 183 "findfdt="\ 184 "if test $board_name = AM43EPOS; then " \ 185 "setenv fdtfile am43x-epos-evm.dtb; fi; " \ 186 "if test $board_name = AM43__GP; then " \ 187 "setenv fdtfile am437x-gp-evm.dtb; fi; " \ 188 "if test $board_name = AM43XXHS; then " \ 189 "setenv fdtfile am437x-gp-evm.dtb; fi; " \ 190 "if test $board_name = AM43__SK; then " \ 191 "setenv fdtfile am437x-sk-evm.dtb; fi; " \ 192 "if test $board_name = AM43_IDK; then " \ 193 "setenv fdtfile am437x-idk-evm.dtb; fi; " \ 194 "if test $fdtfile = undefined; then " \ 195 "echo WARNING: Could not determine device tree; fi; \0" \ 196 NANDARGS \ 197 NETARGS \ 198 DFUARGS \ 199 200 #define CONFIG_BOOTCOMMAND \ 201 "if test ${boot_fit} -eq 1; then " \ 202 "run update_to_fit;" \ 203 "fi;" \ 204 "run findfdt; " \ 205 "run envboot;" \ 206 "run mmcboot;" \ 207 "run usbboot;" \ 208 NANDBOOT \ 209 210 #endif 211 212 #ifndef CONFIG_SPL_BUILD 213 /* CPSW Ethernet */ 214 #define CONFIG_BOOTP_DEFAULT 215 #define CONFIG_BOOTP_DNS2 216 #define CONFIG_BOOTP_SEND_HOSTNAME 217 #define CONFIG_NET_RETRY_COUNT 10 218 #endif 219 220 #define PHY_ANEG_TIMEOUT 8000 /* PHY needs longer aneg time at 1G */ 221 222 #define CONFIG_SYS_RX_ETH_BUFFER 64 223 224 /* NAND support */ 225 #ifdef CONFIG_NAND 226 /* NAND: device related configs */ 227 #define CONFIG_SYS_NAND_PAGE_SIZE 4096 228 #define CONFIG_SYS_NAND_OOBSIZE 224 229 #define CONFIG_SYS_NAND_BLOCK_SIZE (256*1024) 230 #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ 231 CONFIG_SYS_NAND_PAGE_SIZE) 232 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 233 /* NAND: driver related configs */ 234 #define CONFIG_SYS_NAND_ONFI_DETECTION 235 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH16_CODE_HW 236 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 237 #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 238 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, \ 239 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, \ 240 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, \ 241 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, \ 242 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, \ 243 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, \ 244 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, \ 245 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, \ 246 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, \ 247 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, \ 248 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, \ 249 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, \ 250 130, 131, 132, 133, 134, 135, 136, 137, 138, 139, \ 251 140, 141, 142, 143, 144, 145, 146, 147, 148, 149, \ 252 150, 151, 152, 153, 154, 155, 156, 157, 158, 159, \ 253 160, 161, 162, 163, 164, 165, 166, 167, 168, 169, \ 254 170, 171, 172, 173, 174, 175, 176, 177, 178, 179, \ 255 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, \ 256 190, 191, 192, 193, 194, 195, 196, 197, 198, 199, \ 257 200, 201, 202, 203, 204, 205, 206, 207, 208, 209, \ 258 } 259 #define CONFIG_SYS_NAND_ECCSIZE 512 260 #define CONFIG_SYS_NAND_ECCBYTES 26 261 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x00180000 262 /* NAND: SPL related configs */ 263 /* NAND: SPL falcon mode configs */ 264 #ifdef CONFIG_SPL_OS_BOOT 265 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00300000 /* kernel offset */ 266 #endif 267 #define NANDARGS \ 268 "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ 269 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ 270 "nandargs=setenv bootargs console=${console} " \ 271 "${optargs} " \ 272 "root=${nandroot} " \ 273 "rootfstype=${nandrootfstype}\0" \ 274 "nandroot=ubi0:rootfs rw ubi.mtd=NAND.file-system,4096\0" \ 275 "nandrootfstype=ubifs rootwait=1\0" \ 276 "nandboot=echo Booting from nand ...; " \ 277 "run nandargs; " \ 278 "nand read ${fdtaddr} NAND.u-boot-spl-os; " \ 279 "nand read ${loadaddr} NAND.kernel; " \ 280 "bootz ${loadaddr} - ${fdtaddr}\0" 281 #define NANDBOOT "run nandboot; " 282 #else /* !CONFIG_NAND */ 283 #define NANDARGS 284 #define NANDBOOT 285 #endif /* CONFIG_NAND */ 286 287 #if defined(CONFIG_TI_SECURE_DEVICE) 288 /* Avoid relocating onto firewalled area at end of DRAM */ 289 #define CONFIG_PRAM (64 * 1024) 290 #endif /* CONFIG_TI_SECURE_DEVICE */ 291 292 #endif /* __CONFIG_AM43XX_EVM_H */ 293