1 /* 2 * am3517_evm.h - Default configuration for AM3517 EVM board. 3 * 4 * Author: Vaibhav Hiremath <hvaibhav@ti.com> 5 * 6 * Based on omap3_evm_config.h 7 * 8 * Copyright (C) 2010 Texas Instruments Incorporated 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #ifndef __CONFIG_H 14 #define __CONFIG_H 15 16 /* High Level Configuration Options */ 17 18 #define CONFIG_OMAP 19 20 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 21 22 #define CONFIG_EMIF4 /* The chip has EMIF4 controller */ 23 24 /* 25 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM 26 * 64 bytes before this address should be set aside for u-boot.img's 27 * header. That is 0x800FFFC0--0x80100000 should not be used for any 28 * other needs. 29 */ 30 #define CONFIG_SYS_TEXT_BASE 0x80100000 31 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 32 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 33 34 #include <asm/arch/cpu.h> /* get chip and board defs */ 35 #include <asm/arch/omap.h> 36 37 #define CONFIG_MISC_INIT_R 38 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 39 #define CONFIG_SETUP_MEMORY_TAGS 40 #define CONFIG_INITRD_TAG 41 #define CONFIG_REVISION_TAG 42 43 /* Clock Defines */ 44 #define V_OSCK 26000000 /* Clock output from T2 */ 45 #define V_SCLK (V_OSCK >> 1) 46 47 /* Size of malloc() pool */ 48 #define CONFIG_SYS_MALLOC_LEN (16 << 20) 49 50 /* Hardware drivers */ 51 52 /* OMAP GPIO configuration */ 53 #define CONFIG_OMAP_GPIO 54 55 /* NS16550 Configuration */ 56 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 57 #define CONFIG_SYS_NS16550_SERIAL 58 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 59 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 60 61 /* select serial console configuration */ 62 #define CONFIG_CONS_INDEX 3 63 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 64 #define CONFIG_SERIAL3 3 /* UART3 on AM3517 EVM */ 65 66 /* allow to overwrite serial and ethaddr */ 67 #define CONFIG_ENV_OVERWRITE 68 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 69 115200} 70 71 /* 72 * USB configuration 73 * Enable CONFIG_USB_MUSB_HOST for Host functionalities MSC, keyboard 74 * Enable CONFIG_USB_MUSB_GADGET for Device functionalities. 75 */ 76 #define CONFIG_USB_MUSB_AM35X 77 #define CONFIG_USB_MUSB_PIO_ONLY 78 79 #ifdef CONFIG_USB_MUSB_AM35X 80 81 #ifdef CONFIG_USB_MUSB_HOST 82 83 #ifdef CONFIG_USB_KEYBOARD 84 #define CONFIG_SYS_USB_EVENT_POLL 85 #define CONFIG_PREBOOT "usb start" 86 #endif /* CONFIG_USB_KEYBOARD */ 87 88 #endif /* CONFIG_USB_MUSB_HOST */ 89 90 #ifdef CONFIG_USB_MUSB_GADGET 91 #define CONFIG_USB_ETHER 92 #define CONFIG_USB_ETH_RNDIS 93 #endif /* CONFIG_USB_MUSB_GADGET */ 94 95 #endif /* CONFIG_USB_MUSB_AM35X */ 96 97 /* commands to include */ 98 #define CONFIG_CMD_NAND 99 #define CONFIG_CMD_MTDPARTS 100 101 /* I2C */ 102 #define CONFIG_SYS_I2C 103 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000 104 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 105 #define CONFIG_SYS_I2C_OMAP34XX 106 107 /* Ethernet */ 108 #define CONFIG_DRIVER_TI_EMAC 109 #define CONFIG_DRIVER_TI_EMAC_USE_RMII 110 #define CONFIG_MII 111 #define CONFIG_BOOTP_DEFAULT 112 #define CONFIG_BOOTP_DNS 113 #define CONFIG_BOOTP_DNS2 114 #define CONFIG_BOOTP_SEND_HOSTNAME 115 #define CONFIG_NET_RETRY_COUNT 10 116 117 /* Board NAND Info. */ 118 #ifdef CONFIG_NAND 119 #define CONFIG_NAND_OMAP_GPMC 120 #define CONFIG_NAND_OMAP_GPMC_PREFETCH 121 #define CONFIG_BCH 122 #define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */ 123 #define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */ 124 #define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */ 125 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 126 /* to access nand */ 127 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 128 /* to access */ 129 /* nand at CS0 */ 130 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ 131 /* NAND devices */ 132 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 133 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 134 #define CONFIG_SYS_NAND_PAGE_COUNT 64 135 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 136 #define CONFIG_SYS_NAND_OOBSIZE 64 137 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) 138 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 139 #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, 10, \ 140 11, 12, 13, 14, 16, 17, 18, 19, 20, \ 141 21, 22, 23, 24, 25, 26, 27, 28, 30, \ 142 31, 32, 33, 34, 35, 36, 37, 38, 39, \ 143 40, 41, 42, 44, 45, 46, 47, 48, 49, \ 144 50, 51, 52, 53, 54, 55, 56 } 145 146 #define CONFIG_SYS_NAND_ECCSIZE 512 147 #define CONFIG_SYS_NAND_ECCBYTES 13 148 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW 149 #define CONFIG_SYS_NAND_MAX_OOBFREE 2 150 #define CONFIG_SYS_NAND_MAX_ECCPOS 56 151 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 152 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 153 #define CONFIG_MTD_PARTITIONS /* required for UBI partition support */ 154 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ 155 /* NAND block size is 128 KiB. Synchronize these values with 156 * corresponding Device Tree entries in Linux: 157 * MLO(SPL) 4 * NAND_BLOCK_SIZE = 512 KiB @ 0x000000 158 * U-Boot 15 * NAND_BLOCK_SIZE = 1920 KiB @ 0x080000 159 * U-Boot environment 2 * NAND_BLOCK_SIZE = 256 KiB @ 0x260000 160 * Kernel 64 * NAND_BLOCK_SIZE = 8 MiB @ 0x2A0000 161 * DTB 4 * NAND_BLOCK_SIZE = 512 KiB @ 0xAA0000 162 * RootFS Remaining Flash Space @ 0xB20000 163 */ 164 #define MTDIDS_DEFAULT "nand0=omap2-nand.0" 165 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:" \ 166 "512k(MLO)," \ 167 "1920k(u-boot)," \ 168 "256k(u-boot-env)," \ 169 "8m(kernel)," \ 170 "512k(dtb)," \ 171 "-(rootfs)" 172 #else 173 #define MTDIDS_DEFAULT 174 #define MTDPARTS_DEFAULT 175 #endif /* CONFIG_NAND */ 176 177 /* Environment information */ 178 179 #define CONFIG_BOOTFILE "uImage" 180 181 #define CONFIG_EXTRA_ENV_SETTINGS \ 182 "loadaddr=0x82000000\0" \ 183 "console=ttyO2,115200n8\0" \ 184 "fdtfile=am3517-evm.dtb\0" \ 185 "fdtaddr=0x82C00000\0" \ 186 "vram=16M\0" \ 187 "bootenv=uEnv.txt\0" \ 188 "cmdline=\0" \ 189 "optargs=\0" \ 190 "mtdids=" MTDIDS_DEFAULT "\0" \ 191 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 192 "mmcdev=0\0" \ 193 "mmcpart=1\0" \ 194 "mmcroot=/dev/mmcblk0p2 rw\0" \ 195 "mmcrootfstype=ext4 rootwait fixrtc\0" \ 196 "mmcargs=setenv bootargs console=${console} " \ 197 "${mtdparts} " \ 198 "${optargs} " \ 199 "root=${mmcroot} " \ 200 "rootfstype=${mmcrootfstype} " \ 201 "${cmdline}\0" \ 202 "nandargs=setenv bootargs console=${console} " \ 203 "${mtdparts} " \ 204 "${optargs} " \ 205 "root=ubi0:rootfs rw ubi.mtd=rootfs " \ 206 "rootfstype=ubifs rootwait " \ 207 "${cmdline}\0" \ 208 "loadbootenv=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootenv}\0"\ 209 "importbootenv=echo Importing environment from mmc ...; " \ 210 "env import -t ${loadaddr} ${filesize}\0" \ 211 "bootscript=echo Running bootscript from mmc ...; " \ 212 "source ${loadaddr}\0" \ 213 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootfile}\0" \ 214 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdtaddr} ${fdtfile}\0" \ 215 "mmcboot=echo Booting from mmc ...; " \ 216 "run mmcargs; " \ 217 "bootz ${loadaddr} - ${fdtaddr}\0" \ 218 "nandboot=echo Booting from nand ...; " \ 219 "run nandargs; " \ 220 "nand read ${loadaddr} 2a0000 800000; " \ 221 "nand read ${fdtaddr} aa0000 80000; " \ 222 "bootm ${loadaddr} - ${fdtaddr}\0" \ 223 224 #define CONFIG_BOOTCOMMAND \ 225 "mmc dev ${mmcdev}; if mmc rescan; then " \ 226 "echo SD/MMC found on device $mmcdev; " \ 227 "if run loadbootenv; then " \ 228 "run importbootenv; " \ 229 "fi; " \ 230 "echo Checking if uenvcmd is set ...; " \ 231 "if test -n $uenvcmd; then " \ 232 "echo Running uenvcmd ...; " \ 233 "run uenvcmd; " \ 234 "fi; " \ 235 "echo Running default loadimage ...; " \ 236 "setenv bootfile zImage; " \ 237 "if run loadimage; then " \ 238 "run loadfdt; " \ 239 "run mmcboot; " \ 240 "fi; " \ 241 "else run nandboot; fi" 242 243 /* Miscellaneous configurable options */ 244 #define CONFIG_AUTO_COMPLETE 245 #define CONFIG_CMDLINE_EDITING 246 #define CONFIG_SYS_LONGHELP 247 248 /* We set the max number of command args high to avoid HUSH bugs. */ 249 #define CONFIG_SYS_MAXARGS 64 250 251 /* Console I/O Buffer Size */ 252 #define CONFIG_SYS_CBSIZE 512 253 /* Print Buffer Size */ 254 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ 255 + sizeof(CONFIG_SYS_PROMPT) + 16) 256 /* Boot Argument Buffer Size */ 257 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 258 259 /* memtest works on */ 260 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) 261 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 262 0x01F00000) /* 31MB */ 263 264 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ 265 /* address */ 266 267 /* 268 * AM3517 has 12 GP timers, they can be driven by the system clock 269 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 270 * This rate is divided by a local divisor. 271 */ 272 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 273 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 274 275 /* Physical Memory Map */ 276 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 277 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 278 #define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024) 279 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 280 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 281 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 282 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 283 CONFIG_SYS_INIT_RAM_SIZE - \ 284 GENERATED_GBL_DATA_SIZE) 285 286 /* FLASH and environment organization */ 287 288 /* **** PISMO SUPPORT *** */ 289 #define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors */ 290 /* on one chip */ 291 #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */ 292 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 293 294 #if defined(CONFIG_NAND) 295 #define CONFIG_SYS_FLASH_BASE NAND_BASE 296 #endif 297 298 /* Monitor at start of flash */ 299 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 300 301 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 302 #define CONFIG_ENV_SIZE CONFIG_SYS_ENV_SECT_SIZE 303 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ 304 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 305 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 306 #define CONFIG_ENV_IS_IN_NAND 307 308 /* Defines for SPL */ 309 #define CONFIG_SPL_FRAMEWORK 310 #define CONFIG_SPL_BOARD_INIT 311 #define CONFIG_SPL_NAND_SIMPLE 312 #define CONFIG_SPL_TEXT_BASE 0x40200000 313 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ 314 CONFIG_SPL_TEXT_BASE) 315 316 #define CONFIG_SPL_BSS_START_ADDR 0x80000000 317 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ 318 319 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 320 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 321 322 #define CONFIG_SPL_NAND_BASE 323 #define CONFIG_SPL_NAND_DRIVERS 324 #define CONFIG_SPL_NAND_ECC 325 #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" 326 327 #endif /* __CONFIG_H */ 328