xref: /openbmc/u-boot/include/configs/am3517_evm.h (revision d9b88d25)
1 /*
2  * am3517_evm.h - Default configuration for AM3517 EVM board.
3  *
4  * Author: Vaibhav Hiremath <hvaibhav@ti.com>
5  *
6  * Based on omap3_evm_config.h
7  *
8  * Copyright (C) 2010 Texas Instruments Incorporated
9  *
10  * SPDX-License-Identifier:	GPL-2.0+
11  */
12 
13 #ifndef __CONFIG_H
14 #define __CONFIG_H
15 
16 /* High Level Configuration Options */
17 
18 #define CONFIG_OMAP
19 
20 #define CONFIG_SYS_NO_FLASH
21 
22 #define CONFIG_NR_DRAM_BANKS	2	/* CS1 may or may not be populated */
23 
24 /* Common ARM Erratas */
25 #define CONFIG_ARM_ERRATA_454179
26 #define CONFIG_ARM_ERRATA_430973
27 #define CONFIG_ARM_ERRATA_621766
28 
29 #define CONFIG_EMIF4	/* The chip has EMIF4 controller */
30 
31 /*
32  * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
33  * 64 bytes before this address should be set aside for u-boot.img's
34  * header. That is 0x800FFFC0--0x80100000 should not be used for any
35  * other needs.
36  */
37 #define CONFIG_SYS_TEXT_BASE		0x80100000
38 #define CONFIG_SYS_SPL_MALLOC_START	0x80208000
39 #define CONFIG_SYS_SPL_MALLOC_SIZE	0x100000
40 
41 #include <asm/arch/cpu.h>		/* get chip and board defs */
42 #include <asm/arch/omap.h>
43 
44 #define CONFIG_MISC_INIT_R
45 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
46 #define CONFIG_SETUP_MEMORY_TAGS
47 #define CONFIG_INITRD_TAG
48 #define CONFIG_REVISION_TAG
49 
50 /* Clock Defines */
51 #define V_OSCK			26000000	/* Clock output from T2 */
52 #define V_SCLK			(V_OSCK >> 1)
53 
54 /* Size of malloc() pool */
55 #define CONFIG_SYS_MALLOC_LEN		(16 << 20)
56 
57 /* Hardware drivers */
58 
59 /* OMAP GPIO configuration */
60 #define CONFIG_OMAP_GPIO
61 
62 /* NS16550 Configuration */
63 #define V_NS16550_CLK			48000000	/* 48MHz (APLL96/2) */
64 #define CONFIG_SYS_NS16550_SERIAL
65 #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
66 #define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK
67 
68 /* select serial console configuration */
69 #define CONFIG_CONS_INDEX		3
70 #define CONFIG_SYS_NS16550_COM3		OMAP34XX_UART3
71 #define CONFIG_SERIAL3			3	/* UART3 on AM3517 EVM */
72 
73 /* allow to overwrite serial and ethaddr */
74 #define CONFIG_ENV_OVERWRITE
75 #define CONFIG_BAUDRATE			115200
76 #define CONFIG_SYS_BAUDRATE_TABLE	{4800, 9600, 19200, 38400, 57600,\
77 					115200}
78 
79 /* SD/MMC */
80 #define CONFIG_GENERIC_MMC
81 
82 /*
83  * USB configuration
84  * Enable CONFIG_USB_MUSB_HOST for Host functionalities MSC, keyboard
85  * Enable CONFIG_USB_MUSB_GADGET for Device functionalities.
86  */
87 #define CONFIG_USB_MUSB_AM35X
88 #define CONFIG_USB_MUSB_PIO_ONLY
89 
90 #ifdef CONFIG_USB_MUSB_AM35X
91 
92 #ifdef CONFIG_USB_MUSB_HOST
93 
94 #define CONGIG_CMD_STORAGE
95 
96 #ifdef CONFIG_USB_KEYBOARD
97 #define CONFIG_SYS_USB_EVENT_POLL
98 #define CONFIG_PREBOOT "usb start"
99 #endif /* CONFIG_USB_KEYBOARD */
100 
101 #endif /* CONFIG_USB_MUSB_HOST */
102 
103 #ifdef CONFIG_USB_MUSB_GADGET
104 #define CONFIG_USB_ETHER
105 #define CONFIG_USB_ETH_RNDIS
106 #endif /* CONFIG_USB_MUSB_GADGET */
107 
108 #endif /* CONFIG_USB_MUSB_AM35X */
109 
110 /* commands to include */
111 #define CONFIG_CMD_NAND
112 #define CONFIG_CMD_MTDPARTS
113 
114 /* I2C */
115 #define CONFIG_SYS_I2C
116 #define CONFIG_SYS_OMAP24_I2C_SPEED	100000
117 #define CONFIG_SYS_OMAP24_I2C_SLAVE	1
118 #define CONFIG_SYS_I2C_OMAP34XX
119 
120 /* Ethernet */
121 #define CONFIG_DRIVER_TI_EMAC
122 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
123 #define CONFIG_MII
124 #define CONFIG_BOOTP_DEFAULT
125 #define CONFIG_BOOTP_DNS
126 #define CONFIG_BOOTP_DNS2
127 #define CONFIG_BOOTP_SEND_HOSTNAME
128 #define CONFIG_NET_RETRY_COUNT		10
129 
130 /* Board NAND Info. */
131 #ifdef CONFIG_NAND
132 #define CONFIG_NAND_OMAP_GPMC
133 #define CONFIG_NAND_OMAP_GPMC_PREFETCH
134 #define CONFIG_BCH
135 #define CONFIG_CMD_UBIFS		/* Read-only UBI volume operations */
136 #define CONFIG_RBTREE			/* required by CONFIG_CMD_UBI */
137 #define CONFIG_LZO			/* required by CONFIG_CMD_UBIFS */
138 #define CONFIG_SYS_NAND_ADDR		NAND_BASE	/* physical address */
139 							/* to access nand */
140 #define CONFIG_SYS_NAND_BASE		NAND_BASE	/* physical address */
141 							/* to access */
142 							/* nand at CS0 */
143 #define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max number of */
144 							/* NAND devices */
145 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
146 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
147 #define CONFIG_SYS_NAND_PAGE_COUNT	64
148 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
149 #define CONFIG_SYS_NAND_OOBSIZE		64
150 #define CONFIG_SYS_NAND_BLOCK_SIZE	(128 * 1024)
151 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
152 #define CONFIG_SYS_NAND_ECCPOS		{ 2,  3,  4,  5,  6,  7,  8,  9, 10, \
153 					 11, 12, 13, 14, 16, 17, 18, 19, 20, \
154 					 21, 22, 23, 24, 25, 26, 27, 28, 30, \
155 					 31, 32, 33, 34, 35, 36, 37, 38, 39, \
156 					 40, 41, 42, 44, 45, 46, 47, 48, 49, \
157 					 50, 51, 52, 53, 54, 55, 56 }
158 
159 #define CONFIG_SYS_NAND_ECCSIZE		512
160 #define CONFIG_SYS_NAND_ECCBYTES	13
161 #define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
162 #define CONFIG_SYS_NAND_MAX_OOBFREE	2
163 #define CONFIG_SYS_NAND_MAX_ECCPOS	56
164 #define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
165 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x80000
166 #define CONFIG_MTD_PARTITIONS		/* required for UBI partition support */
167 #define CONFIG_MTD_DEVICE		/* needed for mtdparts commands */
168 /* NAND block size is 128 KiB.  Synchronize these values with
169  * corresponding Device Tree entries in Linux:
170  *  MLO(SPL)             4 * NAND_BLOCK_SIZE = 512 KiB  @ 0x000000
171  *  U-Boot              15 * NAND_BLOCK_SIZE = 1920 KiB @ 0x080000
172  *  U-Boot environment   2 * NAND_BLOCK_SIZE = 256 KiB  @ 0x260000
173  *  Kernel              64 * NAND_BLOCK_SIZE = 8 MiB    @ 0x2A0000
174  *  DTB                  4 * NAND_BLOCK_SIZE = 512 KiB  @ 0xAA0000
175  *  RootFS              Remaining Flash Space           @ 0xB20000
176  */
177 #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
178 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:"	\
179 	"512k(MLO),"					\
180 	"1920k(u-boot),"				\
181 	"256k(u-boot-env),"				\
182 	"8m(kernel),"					\
183 	"512k(dtb),"					\
184 	"-(rootfs)"
185 #else
186 #define MTDIDS_DEFAULT
187 #define MTDPARTS_DEFAULT
188 #endif /* CONFIG_NAND */
189 
190 /* Environment information */
191 
192 #define CONFIG_BOOTFILE		"uImage"
193 
194 #define CONFIG_EXTRA_ENV_SETTINGS \
195 	"loadaddr=0x82000000\0" \
196 	"console=ttyO2,115200n8\0" \
197 	"fdtfile=am3517-evm.dtb\0" \
198 	"fdtaddr=0x82C00000\0" \
199 	"vram=16M\0" \
200 	"bootenv=uEnv.txt\0" \
201 	"cmdline=\0" \
202 	"optargs=\0" \
203 	"mtdids=" MTDIDS_DEFAULT "\0" \
204 	"mtdparts=" MTDPARTS_DEFAULT "\0" \
205 	"mmcdev=0\0" \
206 	"mmcpart=1\0" \
207 	"mmcroot=/dev/mmcblk0p2 rw\0" \
208 	"mmcrootfstype=ext4 rootwait fixrtc\0" \
209 	"mmcargs=setenv bootargs console=${console} " \
210 		"${mtdparts} " \
211 		"${optargs} " \
212 		"root=${mmcroot} " \
213 		"rootfstype=${mmcrootfstype} " \
214 		"${cmdline}\0" \
215 	"nandargs=setenv bootargs console=${console} " \
216 		"${mtdparts} " \
217 		"${optargs} " \
218 		"root=ubi0:rootfs rw ubi.mtd=rootfs " \
219 		"rootfstype=ubifs rootwait " \
220 		"${cmdline}\0" \
221 	"loadbootenv=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootenv}\0"\
222 	"importbootenv=echo Importing environment from mmc ...; " \
223 		"env import -t ${loadaddr} ${filesize}\0" \
224 	"bootscript=echo Running bootscript from mmc ...; " \
225 		"source ${loadaddr}\0" \
226 	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootfile}\0" \
227 	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdtaddr} ${fdtfile}\0" \
228 	"mmcboot=echo Booting from mmc ...; " \
229 		"run mmcargs; " \
230 		"bootz ${loadaddr} - ${fdtaddr}\0" \
231 	"nandboot=echo Booting from nand ...; " \
232 		"run nandargs; " \
233 		"nand read ${loadaddr} 2a0000 800000; " \
234 		"nand read ${fdtaddr} aa0000 80000; " \
235 		"bootm ${loadaddr} - ${fdtaddr}\0" \
236 
237 #define CONFIG_BOOTCOMMAND \
238 	"mmc dev ${mmcdev}; if mmc rescan; then " \
239 		"echo SD/MMC found on device $mmcdev; " \
240 		"if run loadbootenv; then " \
241 			"run importbootenv; " \
242 		"fi; " \
243 		"echo Checking if uenvcmd is set ...; " \
244 		"if test -n $uenvcmd; then " \
245 			"echo Running uenvcmd ...; " \
246 			"run uenvcmd; " \
247 		"fi; " \
248 		"echo Running default loadimage ...; " \
249 		"setenv bootfile zImage; " \
250 		"if run loadimage; then " \
251 			"run loadfdt; " \
252 			"run mmcboot; " \
253 		"fi; " \
254 	"else run nandboot; fi"
255 
256 /* Miscellaneous configurable options */
257 #define CONFIG_AUTO_COMPLETE
258 #define CONFIG_CMDLINE_EDITING
259 #define CONFIG_SYS_LONGHELP
260 
261 /* We set the max number of command args high to avoid HUSH bugs. */
262 #define CONFIG_SYS_MAXARGS		64
263 
264 /* Console I/O Buffer Size */
265 #define CONFIG_SYS_CBSIZE		512
266 /* Print Buffer Size */
267 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE \
268 					+ sizeof(CONFIG_SYS_PROMPT) + 16)
269 /* Boot Argument Buffer Size */
270 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
271 
272 /* memtest works on */
273 #define CONFIG_SYS_MEMTEST_START	(OMAP34XX_SDRC_CS0)
274 #define CONFIG_SYS_MEMTEST_END		(OMAP34XX_SDRC_CS0 + \
275 					0x01F00000) /* 31MB */
276 
277 #define CONFIG_SYS_LOAD_ADDR		(OMAP34XX_SDRC_CS0) /* default load */
278 								/* address */
279 
280 /*
281  * AM3517 has 12 GP timers, they can be driven by the system clock
282  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
283  * This rate is divided by a local divisor.
284  */
285 #define CONFIG_SYS_TIMERBASE		OMAP34XX_GPT2
286 #define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */
287 
288 /* Physical Memory Map */
289 #define PHYS_SDRAM_1			OMAP34XX_SDRC_CS0
290 #define PHYS_SDRAM_2			OMAP34XX_SDRC_CS1
291 #define CONFIG_SYS_CS0_SIZE		(256 * 1024 * 1024)
292 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
293 #define CONFIG_SYS_INIT_RAM_ADDR	0x4020f800
294 #define CONFIG_SYS_INIT_RAM_SIZE	0x800
295 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
296 					 CONFIG_SYS_INIT_RAM_SIZE - \
297 					 GENERATED_GBL_DATA_SIZE)
298 
299 /* FLASH and environment organization */
300 
301 /* **** PISMO SUPPORT *** */
302 #define CONFIG_SYS_MAX_FLASH_SECT	520	/* max number of sectors */
303 						/* on one chip */
304 #define CONFIG_SYS_MAX_FLASH_BANKS	2	/* max number of flash banks */
305 #define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 2 sectors */
306 
307 #if defined(CONFIG_NAND)
308 #define CONFIG_SYS_FLASH_BASE		NAND_BASE
309 #endif
310 
311 /* Monitor at start of flash */
312 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
313 
314 #define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */
315 #define CONFIG_ENV_SIZE			CONFIG_SYS_ENV_SECT_SIZE
316 #define SMNAND_ENV_OFFSET		0x260000 /* environment starts here */
317 #define CONFIG_ENV_OFFSET		SMNAND_ENV_OFFSET
318 #define CONFIG_ENV_ADDR			SMNAND_ENV_OFFSET
319 #define CONFIG_ENV_IS_IN_NAND
320 
321 /* Defines for SPL */
322 #define CONFIG_SPL_FRAMEWORK
323 #define CONFIG_SPL_BOARD_INIT
324 #define CONFIG_SPL_NAND_SIMPLE
325 #define CONFIG_SPL_TEXT_BASE		0x40200000
326 #define CONFIG_SPL_MAX_SIZE		(SRAM_SCRATCH_SPACE_ADDR - \
327 					 CONFIG_SPL_TEXT_BASE)
328 
329 #define CONFIG_SPL_BSS_START_ADDR	0x80000000
330 #define CONFIG_SPL_BSS_MAX_SIZE		0x80000		/* 512 KB */
331 
332 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
333 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME		"u-boot.img"
334 
335 #define CONFIG_SPL_NAND_BASE
336 #define CONFIG_SPL_NAND_DRIVERS
337 #define CONFIG_SPL_NAND_ECC
338 #define CONFIG_SPL_LDSCRIPT		"arch/arm/mach-omap2/u-boot-spl.lds"
339 
340 #endif /* __CONFIG_H */
341