1 /* 2 * am3517_crane.h - Default configuration for AM3517 CraneBoard. 3 * 4 * Author: Srinath.R <srinath@mistralsolutions.com> 5 * 6 * Based on include/configs/am3517evm.h 7 * 8 * Copyright (C) 2011 Mistral Solutions pvt Ltd 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 23 */ 24 25 #ifndef __CONFIG_H 26 #define __CONFIG_H 27 28 /* 29 * High Level Configuration Options 30 */ 31 #define CONFIG_OMAP 1 /* in a TI OMAP core */ 32 #define CONFIG_OMAP34XX 1 /* which is a 34XX */ 33 #define CONFIG_OMAP3_AM3517CRANE 1 /* working with CRANEBOARD */ 34 35 #define CONFIG_EMIF4 /* The chip has EMIF4 controller */ 36 37 #include <asm/arch/cpu.h> /* get chip and board defs */ 38 #include <asm/arch/omap3.h> 39 40 /* 41 * Display CPU and Board information 42 */ 43 #define CONFIG_DISPLAY_CPUINFO 1 44 #define CONFIG_DISPLAY_BOARDINFO 1 45 46 /* Clock Defines */ 47 #define V_OSCK 26000000 /* Clock output from T2 */ 48 #define V_SCLK (V_OSCK >> 1) 49 50 #undef CONFIG_USE_IRQ /* no support for IRQs */ 51 #define CONFIG_MISC_INIT_R 52 53 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ 54 #define CONFIG_SETUP_MEMORY_TAGS 1 55 #define CONFIG_INITRD_TAG 1 56 #define CONFIG_REVISION_TAG 1 57 58 /* 59 * Size of malloc() pool 60 */ 61 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */ 62 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) 63 /* initial data */ 64 /* 65 * DDR related 66 */ 67 #define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024) 68 69 /* 70 * Hardware drivers 71 */ 72 73 /* 74 * NS16550 Configuration 75 */ 76 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 77 78 #define CONFIG_SYS_NS16550 79 #define CONFIG_SYS_NS16550_SERIAL 80 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 81 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 82 83 /* 84 * select serial console configuration 85 */ 86 #define CONFIG_CONS_INDEX 3 87 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 88 #define CONFIG_SERIAL3 3 /* UART3 on CRANEBOARD */ 89 90 /* allow to overwrite serial and ethaddr */ 91 #define CONFIG_ENV_OVERWRITE 92 #define CONFIG_BAUDRATE 115200 93 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 94 115200} 95 #define CONFIG_GENERIC_MMC 1 96 #define CONFIG_MMC 1 97 #define CONFIG_OMAP_HSMMC 1 98 #define CONFIG_DOS_PARTITION 1 99 100 /* 101 * USB configuration 102 * Enable CONFIG_MUSB_HCD for Host functionalities MSC, keyboard 103 * Enable CONFIG_MUSB_UDC for Device functionalities. 104 */ 105 #define CONFIG_USB_AM35X 1 106 #define CONFIG_MUSB_HCD 1 107 108 #ifdef CONFIG_USB_AM35X 109 110 #ifdef CONFIG_MUSB_HCD 111 #define CONFIG_CMD_USB 112 113 #define CONFIG_USB_STORAGE 114 #define CONGIG_CMD_STORAGE 115 #define CONFIG_CMD_FAT 116 117 #ifdef CONFIG_USB_KEYBOARD 118 #define CONFIG_SYS_USB_EVENT_POLL 119 #define CONFIG_PREBOOT "usb start" 120 #endif /* CONFIG_USB_KEYBOARD */ 121 122 #endif /* CONFIG_MUSB_HCD */ 123 124 #ifdef CONFIG_MUSB_UDC 125 /* USB device configuration */ 126 #define CONFIG_USB_DEVICE 1 127 #define CONFIG_USB_TTY 1 128 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 129 /* Change these to suit your needs */ 130 #define CONFIG_USBD_VENDORID 0x0451 131 #define CONFIG_USBD_PRODUCTID 0x5678 132 #define CONFIG_USBD_MANUFACTURER "Texas Instruments" 133 #define CONFIG_USBD_PRODUCT_NAME "AM3517CRANE" 134 #endif /* CONFIG_MUSB_UDC */ 135 136 #endif /* CONFIG_USB_AM35X */ 137 138 /* commands to include */ 139 #include <config_cmd_default.h> 140 141 #define CONFIG_CMD_EXT2 /* EXT2 Support */ 142 #define CONFIG_CMD_FAT /* FAT support */ 143 #define CONFIG_CMD_JFFS2 /* JFFS2 Support */ 144 145 #define CONFIG_CMD_I2C /* I2C serial bus support */ 146 #define CONFIG_CMD_MMC /* MMC support */ 147 #define CONFIG_CMD_NAND /* NAND support */ 148 #define CONFIG_CMD_DHCP 149 #undef CONFIG_CMD_PING 150 151 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ 152 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ 153 #undef CONFIG_CMD_IMI /* iminfo */ 154 #undef CONFIG_CMD_IMLS /* List all found images */ 155 156 #define CONFIG_SYS_NO_FLASH 157 #define CONFIG_HARD_I2C 1 158 #define CONFIG_SYS_I2C_SPEED 100000 159 #define CONFIG_SYS_I2C_SLAVE 1 160 #define CONFIG_SYS_I2C_BUS 0 161 #define CONFIG_SYS_I2C_BUS_SELECT 1 162 #define CONFIG_DRIVER_OMAP34XX_I2C 1 163 164 #undef CONFIG_CMD_NET 165 #undef CONFIG_CMD_NFS 166 /* 167 * Board NAND Info. 168 */ 169 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 170 /* to access nand */ 171 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 172 /* to access */ 173 /* nand at CS0 */ 174 175 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ 176 /* NAND devices */ 177 178 #define CONFIG_JFFS2_NAND 179 /* nand device jffs2 lives on */ 180 #define CONFIG_JFFS2_DEV "nand0" 181 /* start of jffs2 partition */ 182 #define CONFIG_JFFS2_PART_OFFSET 0x680000 183 #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* sz of jffs2 part */ 184 185 /* Environment information */ 186 #define CONFIG_BOOTDELAY 10 187 188 #define CONFIG_BOOTFILE "uImage" 189 190 #define CONFIG_EXTRA_ENV_SETTINGS \ 191 "loadaddr=0x82000000\0" \ 192 "console=ttyS2,115200n8\0" \ 193 "mmcdev=0\0" \ 194 "mmcargs=setenv bootargs console=${console} " \ 195 "root=/dev/mmcblk0p2 rw " \ 196 "rootfstype=ext3 rootwait\0" \ 197 "nandargs=setenv bootargs console=${console} " \ 198 "root=/dev/mtdblock4 rw " \ 199 "rootfstype=jffs2\0" \ 200 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 201 "bootscript=echo Running bootscript from mmc ...; " \ 202 "source ${loadaddr}\0" \ 203 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 204 "mmcboot=echo Booting from mmc ...; " \ 205 "run mmcargs; " \ 206 "bootm ${loadaddr}\0" \ 207 "nandboot=echo Booting from nand ...; " \ 208 "run nandargs; " \ 209 "nand read ${loadaddr} 280000 400000; " \ 210 "bootm ${loadaddr}\0" \ 211 212 #define CONFIG_BOOTCOMMAND \ 213 "if mmc rescan ${mmcdev}; then " \ 214 "if run loadbootscript; then " \ 215 "run bootscript; " \ 216 "else " \ 217 "if run loaduimage; then " \ 218 "run mmcboot; " \ 219 "else run nandboot; " \ 220 "fi; " \ 221 "fi; " \ 222 "else run nandboot; fi" 223 224 #define CONFIG_AUTO_COMPLETE 1 225 /* 226 * Miscellaneous configurable options 227 */ 228 #define V_PROMPT "AM3517_CRANE # " 229 230 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 231 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 232 #define CONFIG_SYS_PROMPT V_PROMPT 233 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 234 /* Print Buffer Size */ 235 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 236 sizeof(CONFIG_SYS_PROMPT) + 16) 237 #define CONFIG_SYS_MAXARGS 32 /* max number of command */ 238 /* args */ 239 /* Boot Argument Buffer Size */ 240 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 241 /* memtest works on */ 242 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) 243 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 244 0x01F00000) /* 31MB */ 245 246 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ 247 /* address */ 248 249 /* 250 * AM3517 has 12 GP timers, they can be driven by the system clock 251 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 252 * This rate is divided by a local divisor. 253 */ 254 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 255 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 256 #define CONFIG_SYS_HZ 1000 257 258 /*----------------------------------------------------------------------- 259 * Stack sizes 260 * 261 * The stack sizes are set up in start.S using the settings below 262 */ 263 #define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */ 264 265 /*----------------------------------------------------------------------- 266 * Physical Memory Map 267 */ 268 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 269 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 270 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 271 272 /*----------------------------------------------------------------------- 273 * FLASH and environment organization 274 */ 275 276 /* **** PISMO SUPPORT *** */ 277 278 /* Configure the PISMO */ 279 #define PISMO1_NAND_SIZE GPMC_SIZE_128M 280 #define PISMO1_ONEN_SIZE GPMC_SIZE_128M 281 282 #define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors */ 283 /* on one chip */ 284 #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */ 285 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 286 287 #define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE 288 289 /* Monitor at start of flash */ 290 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 291 292 #define CONFIG_NAND_OMAP_GPMC 293 #define GPMC_NAND_ECC_LP_x16_LAYOUT 1 294 #define CONFIG_ENV_IS_IN_NAND 1 295 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ 296 297 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB sector */ 298 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 299 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 300 301 /*----------------------------------------------------------------------- 302 * CFI FLASH driver setup 303 */ 304 /* timeout values are in ticks */ 305 #define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ) 306 #define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ) 307 308 /* Flash banks JFFS2 should use */ 309 #define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \ 310 CONFIG_SYS_MAX_NAND_DEVICE) 311 #define CONFIG_SYS_JFFS2_MEM_NAND 312 /* use flash_info[2] */ 313 #define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS 314 #define CONFIG_SYS_JFFS2_NUM_BANKS 1 315 316 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 317 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 318 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 319 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 320 CONFIG_SYS_INIT_RAM_SIZE - \ 321 GENERATED_GBL_DATA_SIZE) 322 323 /* Defines for SPL */ 324 #define CONFIG_SPL 325 #define CONFIG_SPL_NAND_SIMPLE 326 #define CONFIG_SPL_TEXT_BASE 0x40200800 327 #define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ 328 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 329 330 #define CONFIG_SPL_BSS_START_ADDR 0x80000000 331 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ 332 333 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ 334 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ 335 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 336 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" 337 338 #define CONFIG_SPL_LIBCOMMON_SUPPORT 339 #define CONFIG_SPL_LIBDISK_SUPPORT 340 #define CONFIG_SPL_I2C_SUPPORT 341 #define CONFIG_SPL_LIBGENERIC_SUPPORT 342 #define CONFIG_SPL_MMC_SUPPORT 343 #define CONFIG_SPL_FAT_SUPPORT 344 #define CONFIG_SPL_SERIAL_SUPPORT 345 #define CONFIG_SPL_NAND_SUPPORT 346 #define CONFIG_SPL_POWER_SUPPORT 347 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" 348 349 /* NAND boot config */ 350 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 351 #define CONFIG_SYS_NAND_PAGE_COUNT 64 352 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 353 #define CONFIG_SYS_NAND_OOBSIZE 64 354 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 355 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 356 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ 357 10, 11, 12, 13} 358 #define CONFIG_SYS_NAND_ECCSIZE 512 359 #define CONFIG_SYS_NAND_ECCBYTES 3 360 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 361 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 362 363 /* 364 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM 365 * 64 bytes before this address should be set aside for u-boot.img's 366 * header. That is 0x800FFFC0--0x80100000 should not be used for any 367 * other needs. 368 */ 369 #define CONFIG_SYS_TEXT_BASE 0x80100000 370 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 371 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 372 373 #endif /* __CONFIG_H */ 374