1 /* 2 * include/configs/alt.h 3 * This file is alt board configuration. 4 * 5 * Copyright (C) 2014 Renesas Electronics Corporation 6 * 7 * SPDX-License-Identifier: GPL-2.0 8 */ 9 10 #ifndef __ALT_H 11 #define __ALT_H 12 13 #undef DEBUG 14 #define CONFIG_ARMV7 15 #define CONFIG_R8A7794 16 #define CONFIG_RMOBILE 17 #define CONFIG_RMOBILE_BOARD_STRING "Alt" 18 #define CONFIG_SH_GPIO_PFC 19 20 #include <asm/arch/rmobile.h> 21 22 #define CONFIG_CMD_EDITENV 23 #define CONFIG_CMD_SAVEENV 24 #define CONFIG_CMD_MEMORY 25 #define CONFIG_CMD_DFL 26 #define CONFIG_CMD_SDRAM 27 #define CONFIG_CMD_RUN 28 #define CONFIG_CMD_LOADS 29 #define CONFIG_CMD_NET 30 #define CONFIG_CMD_MII 31 #define CONFIG_CMD_PING 32 #define CONFIG_CMD_DHCP 33 #define CONFIG_CMD_NFS 34 #define CONFIG_CMD_BOOTZ 35 #define CONFIG_CMD_SF 36 #define CONFIG_CMD_SPI 37 38 #define CONFIG_SYS_TEXT_BASE 0xE6304000 39 #define CONFIG_SYS_THUMB_BUILD 40 #define CONFIG_SYS_GENERIC_BOARD 41 42 #define CONFIG_CMDLINE_TAG 43 #define CONFIG_SETUP_MEMORY_TAGS 44 #define CONFIG_INITRD_TAG 45 #define CONFIG_CMDLINE_EDITING 46 47 #define CONFIG_OF_LIBFDT 48 #define BOARD_LATE_INIT 49 50 #define CONFIG_BAUDRATE 38400 51 #define CONFIG_BOOTDELAY 3 52 #define CONFIG_BOOTARGS "" 53 54 #define CONFIG_VERSION_VARIABLE 55 #undef CONFIG_SHOW_BOOT_PROGRESS 56 57 #define CONFIG_ARCH_CPU_INIT 58 #define CONFIG_DISPLAY_CPUINFO 59 #define CONFIG_DISPLAY_BOARDINFO 60 #define CONFIG_BOARD_EARLY_INIT_F 61 #define CONFIG_TMU_TIMER 62 63 #define CONFIG_SYS_INIT_SP_ADDR 0xE633FFFC 64 #define STACK_AREA_SIZE 0xC000 65 #define LOW_LEVEL_MERAM_STACK \ 66 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) 67 68 /* MEMORY */ 69 #define ALT_SDRAM_BASE 0x40000000 70 #define ALT_SDRAM_SIZE (1024u * 1024 * 1024) 71 #define ALT_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) 72 73 #define CONFIG_SYS_LONGHELP 74 #define CONFIG_SYS_CBSIZE 256 75 #define CONFIG_SYS_PBSIZE 256 76 #define CONFIG_SYS_MAXARGS 16 77 #define CONFIG_SYS_BARGSIZE 512 78 #define CONFIG_SYS_BAUDRATE_TABLE { 38400, 115200 } 79 80 /* SCIF */ 81 #define CONFIG_SCIF_CONSOLE 82 #define CONFIG_CONS_SCIF2 83 #undef CONFIG_SYS_CONSOLE_INFO_QUIET 84 #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 85 #undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE 86 87 #define CONFIG_SYS_MEMTEST_START (ALT_SDRAM_BASE) 88 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ 89 504 * 1024 * 1024) 90 #undef CONFIG_SYS_ALT_MEMTEST 91 #undef CONFIG_SYS_MEMTEST_SCRATCH 92 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 93 94 #define CONFIG_SYS_SDRAM_BASE (ALT_SDRAM_BASE) 95 #define CONFIG_SYS_SDRAM_SIZE (ALT_UBOOT_SDRAM_SIZE) 96 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fc0) 97 #define CONFIG_NR_DRAM_BANKS 1 98 99 #define CONFIG_SYS_MONITOR_BASE 0x00000000 100 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) 101 #define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024) 102 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 103 104 /* FLASH */ 105 #define CONFIG_SPI 106 #define CONFIG_SPI_FLASH_BAR 107 #define CONFIG_SH_QSPI 108 #define CONFIG_SPI_FLASH 109 #define CONFIG_SPI_FLASH_SPANSION 110 #define CONFIG_SPI_FLASH_QUAD 111 #define CONFIG_SYS_NO_FLASH 112 113 /* ENV setting */ 114 #define CONFIG_ENV_IS_IN_SPI_FLASH 115 #define CONFIG_ENV_SECT_SIZE (256 * 1024) 116 #define CONFIG_ENV_ADDR 0xC0000 117 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR) 118 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 119 120 #define CONFIG_EXTRA_ENV_SETTINGS \ 121 "bootm_low=0x40e00000\0" \ 122 "bootm_size=0x100000\0" \ 123 124 /* SH Ether */ 125 #define CONFIG_NET_MULTI 126 #define CONFIG_SH_ETHER 127 #define CONFIG_SH_ETHER_USE_PORT 0 128 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 129 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII 130 #define CONFIG_SH_ETHER_CACHE_WRITEBACK 131 #define CONFIG_SH_ETHER_CACHE_INVALIDATE 132 #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 133 #define CONFIG_PHYLIB 134 #define CONFIG_PHY_MICREL 135 #define CONFIG_BITBANGMII 136 #define CONFIG_BITBANGMII_MULTI 137 138 /* Board Clock */ 139 #define RMOBILE_XTAL_CLK 20000000u 140 #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK 141 #define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */ 142 #define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 156 / 2) 143 #define CONFIG_P_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 24) 144 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_P_CLK_FREQ 145 146 #define CONFIG_SYS_TMU_CLK_DIV 4 147 148 /* i2c */ 149 #define CONFIG_CMD_I2C 150 #define CONFIG_SYS_I2C 151 #define CONFIG_SYS_I2C_SH 152 #define CONFIG_SYS_I2C_SLAVE 0x7F 153 #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 3 154 #define CONFIG_SYS_I2C_SH_BASE0 0xE6500000 155 #define CONFIG_SYS_I2C_SH_SPEED0 400000 156 #define CONFIG_SYS_I2C_SH_BASE1 0xE6510000 157 #define CONFIG_SYS_I2C_SH_SPEED1 400000 158 #define CONFIG_SYS_I2C_SH_BASE2 0xE60B0000 159 #define CONFIG_SYS_I2C_SH_SPEED2 400000 160 #define CONFIG_SH_I2C_DATA_HIGH 4 161 #define CONFIG_SH_I2C_DATA_LOW 5 162 #define CONFIG_SH_I2C_CLOCK 10000000 163 164 #define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */ 165 166 #endif /* __ALT_H */ 167