1 /* 2 * include/configs/alt.h 3 * This file is alt board configuration. 4 * 5 * Copyright (C) 2014 Renesas Electronics Corporation 6 * 7 * SPDX-License-Identifier: GPL-2.0 8 */ 9 10 #ifndef __ALT_H 11 #define __ALT_H 12 13 #undef DEBUG 14 #define CONFIG_R8A7794 15 #define CONFIG_RMOBILE_BOARD_STRING "Alt" 16 17 #include "rcar-gen2-common.h" 18 19 #if defined(CONFIG_RMOBILE_EXTRAM_BOOT) 20 #define CONFIG_SYS_TEXT_BASE 0x70000000 21 #else 22 #define CONFIG_SYS_TEXT_BASE 0xE6304000 23 #endif 24 25 #if defined(CONFIG_RMOBILE_EXTRAM_BOOT) 26 #define CONFIG_SYS_INIT_SP_ADDR 0x7003FFFC 27 #else 28 #define CONFIG_SYS_INIT_SP_ADDR 0xE633FFFC 29 #endif 30 #define STACK_AREA_SIZE 0xC000 31 #define LOW_LEVEL_MERAM_STACK \ 32 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) 33 34 /* MEMORY */ 35 #define RCAR_GEN2_SDRAM_BASE 0x40000000 36 #define RCAR_GEN2_SDRAM_SIZE (1024u * 1024 * 1024) 37 #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) 38 39 /* SCIF */ 40 #define CONFIG_SCIF_CONSOLE 41 42 /* FLASH */ 43 #define CONFIG_SPI 44 #define CONFIG_SPI_FLASH_BAR 45 #define CONFIG_SH_QSPI 46 #define CONFIG_SPI_FLASH_SPANSION 47 #define CONFIG_SPI_FLASH_QUAD 48 #define CONFIG_SYS_NO_FLASH 49 50 /* SH Ether */ 51 #define CONFIG_SH_ETHER 52 #define CONFIG_SH_ETHER_USE_PORT 0 53 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 54 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII 55 #define CONFIG_SH_ETHER_CACHE_WRITEBACK 56 #define CONFIG_SH_ETHER_CACHE_INVALIDATE 57 #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 58 #define CONFIG_PHYLIB 59 #define CONFIG_PHY_MICREL 60 #define CONFIG_BITBANGMII 61 #define CONFIG_BITBANGMII_MULTI 62 63 /* Board Clock */ 64 #define RMOBILE_XTAL_CLK 20000000u 65 #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK 66 #define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */ 67 #define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 156 / 2) 68 #define CONFIG_P_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 24) 69 70 #define CONFIG_SYS_TMU_CLK_DIV 4 71 72 /* i2c */ 73 #define CONFIG_CMD_I2C 74 #define CONFIG_SYS_I2C 75 #define CONFIG_SYS_I2C_SH 76 #define CONFIG_SYS_I2C_SLAVE 0x7F 77 #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 3 78 #define CONFIG_SYS_I2C_SH_SPEED0 400000 79 #define CONFIG_SYS_I2C_SH_SPEED1 400000 80 #define CONFIG_SYS_I2C_SH_SPEED2 400000 81 #define CONFIG_SH_I2C_DATA_HIGH 4 82 #define CONFIG_SH_I2C_DATA_LOW 5 83 #define CONFIG_SH_I2C_CLOCK 10000000 84 85 #define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */ 86 87 /* USB */ 88 #define CONFIG_USB_STORAGE 89 #define CONFIG_USB_EHCI 90 #define CONFIG_USB_EHCI_RMOBILE 91 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 92 93 /* MMCIF */ 94 #define CONFIG_MMC 95 #define CONFIG_GENERIC_MMC 96 #define CONFIG_CMD_MMC 97 98 #define CONFIG_SH_MMCIF 99 #define CONFIG_SH_MMCIF_ADDR 0xee200000 100 #define CONFIG_SH_MMCIF_CLK 48000000 101 102 /* Module stop status bits */ 103 /* INTC-RT */ 104 #define CONFIG_SMSTP0_ENA 0x00400000 105 /* MSIF */ 106 #define CONFIG_SMSTP2_ENA 0x00002000 107 /* INTC-SYS, IRQC */ 108 #define CONFIG_SMSTP4_ENA 0x00000180 109 /* SCIF2 */ 110 #define CONFIG_SMSTP7_ENA 0x00080000 111 112 /* SDHI */ 113 #define CONFIG_SH_SDHI_FREQ 97500000 114 115 #endif /* __ALT_H */ 116