xref: /openbmc/u-boot/include/configs/alt.h (revision 8f240a3b)
1 /*
2  * include/configs/alt.h
3  *     This file is alt board configuration.
4  *
5  * Copyright (C) 2014 Renesas Electronics Corporation
6  *
7  * SPDX-License-Identifier: GPL-2.0
8  */
9 
10 #ifndef __ALT_H
11 #define __ALT_H
12 
13 #undef DEBUG
14 #define CONFIG_ARCH_RMOBILE_BOARD_STRING "Alt"
15 
16 #include "rcar-gen2-common.h"
17 
18 #if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT)
19 #define CONFIG_SYS_INIT_SP_ADDR		0x7003FFFC
20 #else
21 #define CONFIG_SYS_INIT_SP_ADDR		0xE633FFFC
22 #endif
23 #define STACK_AREA_SIZE			0xC000
24 #define LOW_LEVEL_MERAM_STACK \
25 		(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
26 
27 /* MEMORY */
28 #define RCAR_GEN2_SDRAM_BASE		0x40000000
29 #define RCAR_GEN2_SDRAM_SIZE		(1024u * 1024 * 1024)
30 #define RCAR_GEN2_UBOOT_SDRAM_SIZE	(512 * 1024 * 1024)
31 
32 /* SCIF */
33 
34 /* FLASH */
35 #define CONFIG_SPI
36 #define CONFIG_SPI_FLASH_QUAD
37 
38 /* SH Ether */
39 #define CONFIG_SH_ETHER_USE_PORT	0
40 #define CONFIG_SH_ETHER_PHY_ADDR	0x1
41 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
42 #define CONFIG_SH_ETHER_CACHE_WRITEBACK
43 #define CONFIG_SH_ETHER_CACHE_INVALIDATE
44 #define CONFIG_SH_ETHER_ALIGNE_SIZE 64
45 #define CONFIG_BITBANGMII
46 #define CONFIG_BITBANGMII_MULTI
47 
48 /* Board Clock */
49 #define RMOBILE_XTAL_CLK        20000000u
50 #define CONFIG_SYS_CLK_FREQ     RMOBILE_XTAL_CLK
51 #define CONFIG_SH_TMU_CLK_FREQ  (CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */
52 #define CONFIG_PLL1_CLK_FREQ    (CONFIG_SYS_CLK_FREQ * 156 / 2)
53 #define CONFIG_P_CLK_FREQ	(CONFIG_PLL1_CLK_FREQ / 24)
54 
55 #define CONFIG_SYS_TMU_CLK_DIV  4
56 
57 /* i2c */
58 #define CONFIG_SYS_I2C
59 #define CONFIG_SYS_I2C_SH
60 #define CONFIG_SYS_I2C_SLAVE		0x7F
61 #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS       3
62 #define CONFIG_SYS_I2C_SH_SPEED0	400000
63 #define CONFIG_SYS_I2C_SH_SPEED1	400000
64 #define CONFIG_SYS_I2C_SH_SPEED2	400000
65 #define CONFIG_SH_I2C_DATA_HIGH		4
66 #define CONFIG_SH_I2C_DATA_LOW		5
67 #define CONFIG_SH_I2C_CLOCK		10000000
68 
69 #define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
70 
71 /* USB */
72 #define CONFIG_USB_EHCI_RMOBILE
73 #define CONFIG_USB_MAX_CONTROLLER_COUNT	2
74 
75 /* MMCIF */
76 #define CONFIG_SH_MMCIF
77 #define CONFIG_SH_MMCIF_ADDR		0xee200000
78 #define CONFIG_SH_MMCIF_CLK		48000000
79 
80 /* Module stop status bits */
81 /* INTC-RT */
82 #define CONFIG_SMSTP0_ENA	0x00400000
83 /* MSIF */
84 #define CONFIG_SMSTP2_ENA	0x00002000
85 /* INTC-SYS, IRQC */
86 #define CONFIG_SMSTP4_ENA	0x00000180
87 /* SCIF2 */
88 #define CONFIG_SMSTP7_ENA	0x00080000
89 
90 /* SDHI */
91 #define CONFIG_SH_SDHI_FREQ		97500000
92 
93 #endif /* __ALT_H */
94