1 /* 2 * include/configs/alt.h 3 * This file is alt board configuration. 4 * 5 * Copyright (C) 2014 Renesas Electronics Corporation 6 * 7 * SPDX-License-Identifier: GPL-2.0 8 */ 9 10 #ifndef __ALT_H 11 #define __ALT_H 12 13 #undef DEBUG 14 #define CONFIG_ARMV7 15 #define CONFIG_R8A7794 16 #define CONFIG_RMOBILE_BOARD_STRING "Alt" 17 #define CONFIG_SH_GPIO_PFC 18 19 #include <asm/arch/rmobile.h> 20 21 #define CONFIG_CMD_EDITENV 22 #define CONFIG_CMD_SAVEENV 23 #define CONFIG_CMD_MEMORY 24 #define CONFIG_CMD_DFL 25 #define CONFIG_CMD_SDRAM 26 #define CONFIG_CMD_RUN 27 #define CONFIG_CMD_LOADS 28 #define CONFIG_CMD_NET 29 #define CONFIG_CMD_MII 30 #define CONFIG_CMD_PING 31 #define CONFIG_CMD_DHCP 32 #define CONFIG_CMD_NFS 33 #define CONFIG_CMD_BOOTZ 34 #define CONFIG_CMD_SF 35 #define CONFIG_CMD_SPI 36 37 #define CONFIG_SYS_TEXT_BASE 0xE6304000 38 #define CONFIG_SYS_THUMB_BUILD 39 #define CONFIG_SYS_GENERIC_BOARD 40 41 #define CONFIG_CMDLINE_TAG 42 #define CONFIG_SETUP_MEMORY_TAGS 43 #define CONFIG_INITRD_TAG 44 #define CONFIG_CMDLINE_EDITING 45 46 #define CONFIG_OF_LIBFDT 47 #define BOARD_LATE_INIT 48 49 #define CONFIG_BAUDRATE 38400 50 #define CONFIG_BOOTDELAY 3 51 #define CONFIG_BOOTARGS "" 52 53 #define CONFIG_VERSION_VARIABLE 54 #undef CONFIG_SHOW_BOOT_PROGRESS 55 56 #define CONFIG_ARCH_CPU_INIT 57 #define CONFIG_DISPLAY_CPUINFO 58 #define CONFIG_DISPLAY_BOARDINFO 59 #define CONFIG_BOARD_EARLY_INIT_F 60 #define CONFIG_TMU_TIMER 61 62 #define CONFIG_SYS_INIT_SP_ADDR 0xE633FFFC 63 #define STACK_AREA_SIZE 0xC000 64 #define LOW_LEVEL_MERAM_STACK \ 65 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) 66 67 /* MEMORY */ 68 #define ALT_SDRAM_BASE 0x40000000 69 #define ALT_SDRAM_SIZE (1024u * 1024 * 1024) 70 #define ALT_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) 71 72 #define CONFIG_SYS_LONGHELP 73 #define CONFIG_SYS_CBSIZE 256 74 #define CONFIG_SYS_PBSIZE 256 75 #define CONFIG_SYS_MAXARGS 16 76 #define CONFIG_SYS_BARGSIZE 512 77 #define CONFIG_SYS_BAUDRATE_TABLE { 38400, 115200 } 78 79 /* SCIF */ 80 #define CONFIG_SCIF_CONSOLE 81 #define CONFIG_CONS_SCIF2 82 #undef CONFIG_SYS_CONSOLE_INFO_QUIET 83 #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 84 #undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE 85 86 #define CONFIG_SYS_MEMTEST_START (ALT_SDRAM_BASE) 87 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ 88 504 * 1024 * 1024) 89 #undef CONFIG_SYS_ALT_MEMTEST 90 #undef CONFIG_SYS_MEMTEST_SCRATCH 91 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 92 93 #define CONFIG_SYS_SDRAM_BASE (ALT_SDRAM_BASE) 94 #define CONFIG_SYS_SDRAM_SIZE (ALT_UBOOT_SDRAM_SIZE) 95 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fc0) 96 #define CONFIG_NR_DRAM_BANKS 1 97 98 #define CONFIG_SYS_MONITOR_BASE 0x00000000 99 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) 100 #define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024) 101 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 102 103 /* FLASH */ 104 #define CONFIG_SPI 105 #define CONFIG_SPI_FLASH_BAR 106 #define CONFIG_SH_QSPI 107 #define CONFIG_SPI_FLASH 108 #define CONFIG_SPI_FLASH_SPANSION 109 #define CONFIG_SPI_FLASH_QUAD 110 #define CONFIG_SYS_NO_FLASH 111 112 /* ENV setting */ 113 #define CONFIG_ENV_IS_IN_SPI_FLASH 114 #define CONFIG_ENV_SECT_SIZE (256 * 1024) 115 #define CONFIG_ENV_ADDR 0xC0000 116 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR) 117 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 118 119 #define CONFIG_EXTRA_ENV_SETTINGS \ 120 "bootm_low=0x40e00000\0" \ 121 "bootm_size=0x100000\0" \ 122 123 /* SH Ether */ 124 #define CONFIG_NET_MULTI 125 #define CONFIG_SH_ETHER 126 #define CONFIG_SH_ETHER_USE_PORT 0 127 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 128 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII 129 #define CONFIG_SH_ETHER_CACHE_WRITEBACK 130 #define CONFIG_SH_ETHER_CACHE_INVALIDATE 131 #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 132 #define CONFIG_PHYLIB 133 #define CONFIG_PHY_MICREL 134 #define CONFIG_BITBANGMII 135 #define CONFIG_BITBANGMII_MULTI 136 137 /* Board Clock */ 138 #define RMOBILE_XTAL_CLK 20000000u 139 #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK 140 #define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */ 141 #define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 156 / 2) 142 #define CONFIG_P_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 24) 143 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_P_CLK_FREQ 144 145 #define CONFIG_SYS_TMU_CLK_DIV 4 146 147 /* i2c */ 148 #define CONFIG_CMD_I2C 149 #define CONFIG_SYS_I2C 150 #define CONFIG_SYS_I2C_SH 151 #define CONFIG_SYS_I2C_SLAVE 0x7F 152 #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 3 153 #define CONFIG_SYS_I2C_SH_BASE0 0xE6500000 154 #define CONFIG_SYS_I2C_SH_SPEED0 400000 155 #define CONFIG_SYS_I2C_SH_BASE1 0xE6510000 156 #define CONFIG_SYS_I2C_SH_SPEED1 400000 157 #define CONFIG_SYS_I2C_SH_BASE2 0xE60B0000 158 #define CONFIG_SYS_I2C_SH_SPEED2 400000 159 #define CONFIG_SH_I2C_DATA_HIGH 4 160 #define CONFIG_SH_I2C_DATA_LOW 5 161 #define CONFIG_SH_I2C_CLOCK 10000000 162 163 #define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */ 164 165 #endif /* __ALT_H */ 166