1cff2f5f0SNobuhiro Iwamatsu /* 2cff2f5f0SNobuhiro Iwamatsu * include/configs/alt.h 3cff2f5f0SNobuhiro Iwamatsu * This file is alt board configuration. 4cff2f5f0SNobuhiro Iwamatsu * 5cff2f5f0SNobuhiro Iwamatsu * Copyright (C) 2014 Renesas Electronics Corporation 6cff2f5f0SNobuhiro Iwamatsu * 7cff2f5f0SNobuhiro Iwamatsu * SPDX-License-Identifier: GPL-2.0 8cff2f5f0SNobuhiro Iwamatsu */ 9cff2f5f0SNobuhiro Iwamatsu 10cff2f5f0SNobuhiro Iwamatsu #ifndef __ALT_H 11cff2f5f0SNobuhiro Iwamatsu #define __ALT_H 12cff2f5f0SNobuhiro Iwamatsu 13cff2f5f0SNobuhiro Iwamatsu #undef DEBUG 14cff2f5f0SNobuhiro Iwamatsu #define CONFIG_R8A7794 15cff2f5f0SNobuhiro Iwamatsu #define CONFIG_RMOBILE_BOARD_STRING "Alt" 16cff2f5f0SNobuhiro Iwamatsu 17*5ca6dfe6SNobuhiro Iwamatsu #include "rcar-gen2-common.h" 18cff2f5f0SNobuhiro Iwamatsu 19c9b59bf7SNobuhiro Iwamatsu #if defined(CONFIG_RMOBILE_EXTRAM_BOOT) 20c9b59bf7SNobuhiro Iwamatsu #define CONFIG_SYS_TEXT_BASE 0x70000000 21c9b59bf7SNobuhiro Iwamatsu #else 22cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SYS_TEXT_BASE 0xE6304000 23c9b59bf7SNobuhiro Iwamatsu #endif 24cff2f5f0SNobuhiro Iwamatsu 25c9b59bf7SNobuhiro Iwamatsu #if defined(CONFIG_RMOBILE_EXTRAM_BOOT) 26c9b59bf7SNobuhiro Iwamatsu #define CONFIG_SYS_INIT_SP_ADDR 0x7003FFFC 27c9b59bf7SNobuhiro Iwamatsu #else 28cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SYS_INIT_SP_ADDR 0xE633FFFC 29c9b59bf7SNobuhiro Iwamatsu #endif 30cff2f5f0SNobuhiro Iwamatsu #define STACK_AREA_SIZE 0xC000 31cff2f5f0SNobuhiro Iwamatsu #define LOW_LEVEL_MERAM_STACK \ 32cff2f5f0SNobuhiro Iwamatsu (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) 33cff2f5f0SNobuhiro Iwamatsu 34cff2f5f0SNobuhiro Iwamatsu /* MEMORY */ 35*5ca6dfe6SNobuhiro Iwamatsu #define RCAR_GEN2_SDRAM_BASE 0x40000000 36*5ca6dfe6SNobuhiro Iwamatsu #define RCAR_GEN2_SDRAM_SIZE (1024u * 1024 * 1024) 37*5ca6dfe6SNobuhiro Iwamatsu #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) 38cff2f5f0SNobuhiro Iwamatsu 39cff2f5f0SNobuhiro Iwamatsu /* SCIF */ 40cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SCIF_CONSOLE 41cff2f5f0SNobuhiro Iwamatsu #define CONFIG_CONS_SCIF2 4262b571a3SNobuhiro Iwamatsu #define CONFIG_SCIF_USE_EXT_CLK 43cff2f5f0SNobuhiro Iwamatsu 44cff2f5f0SNobuhiro Iwamatsu /* FLASH */ 45cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SPI 46cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SPI_FLASH_BAR 47cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SH_QSPI 48cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SPI_FLASH 49cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SPI_FLASH_SPANSION 50cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SPI_FLASH_QUAD 51cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SYS_NO_FLASH 52cff2f5f0SNobuhiro Iwamatsu 53cff2f5f0SNobuhiro Iwamatsu /* SH Ether */ 54cff2f5f0SNobuhiro Iwamatsu #define CONFIG_NET_MULTI 55cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SH_ETHER 56cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SH_ETHER_USE_PORT 0 57cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SH_ETHER_PHY_ADDR 0x1 58cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII 59cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SH_ETHER_CACHE_WRITEBACK 60cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SH_ETHER_CACHE_INVALIDATE 61cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 62cff2f5f0SNobuhiro Iwamatsu #define CONFIG_PHYLIB 63cff2f5f0SNobuhiro Iwamatsu #define CONFIG_PHY_MICREL 64cff2f5f0SNobuhiro Iwamatsu #define CONFIG_BITBANGMII 65cff2f5f0SNobuhiro Iwamatsu #define CONFIG_BITBANGMII_MULTI 66cff2f5f0SNobuhiro Iwamatsu 67cff2f5f0SNobuhiro Iwamatsu /* Board Clock */ 68cff2f5f0SNobuhiro Iwamatsu #define RMOBILE_XTAL_CLK 20000000u 69cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK 70cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */ 71cff2f5f0SNobuhiro Iwamatsu #define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 156 / 2) 72cff2f5f0SNobuhiro Iwamatsu #define CONFIG_P_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 24) 7362b571a3SNobuhiro Iwamatsu #define CONFIG_SH_SCIF_CLK_FREQ 14745600 /* External Clock */ 74cff2f5f0SNobuhiro Iwamatsu 75cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SYS_TMU_CLK_DIV 4 76cff2f5f0SNobuhiro Iwamatsu 77cff2f5f0SNobuhiro Iwamatsu /* i2c */ 78cff2f5f0SNobuhiro Iwamatsu #define CONFIG_CMD_I2C 79cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SYS_I2C 80cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH 81cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SLAVE 0x7F 82cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 3 83cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH_SPEED0 400000 84cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH_SPEED1 400000 85cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH_SPEED2 400000 86cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SH_I2C_DATA_HIGH 4 87cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SH_I2C_DATA_LOW 5 88cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SH_I2C_CLOCK 10000000 89cff2f5f0SNobuhiro Iwamatsu 90cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */ 91cff2f5f0SNobuhiro Iwamatsu 927ffc8dfbSNobuhiro Iwamatsu /* USB */ 937ffc8dfbSNobuhiro Iwamatsu #define CONFIG_USB_STORAGE 947ffc8dfbSNobuhiro Iwamatsu #define CONFIG_USB_EHCI 957ffc8dfbSNobuhiro Iwamatsu #define CONFIG_USB_EHCI_RMOBILE 967ffc8dfbSNobuhiro Iwamatsu #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 977ffc8dfbSNobuhiro Iwamatsu 98cff2f5f0SNobuhiro Iwamatsu #endif /* __ALT_H */ 99