xref: /openbmc/u-boot/include/configs/alt.h (revision 25f9613f)
1cff2f5f0SNobuhiro Iwamatsu /*
2cff2f5f0SNobuhiro Iwamatsu  * include/configs/alt.h
3cff2f5f0SNobuhiro Iwamatsu  *     This file is alt board configuration.
4cff2f5f0SNobuhiro Iwamatsu  *
5cff2f5f0SNobuhiro Iwamatsu  * Copyright (C) 2014 Renesas Electronics Corporation
6cff2f5f0SNobuhiro Iwamatsu  *
7cff2f5f0SNobuhiro Iwamatsu  * SPDX-License-Identifier: GPL-2.0
8cff2f5f0SNobuhiro Iwamatsu  */
9cff2f5f0SNobuhiro Iwamatsu 
10cff2f5f0SNobuhiro Iwamatsu #ifndef __ALT_H
11cff2f5f0SNobuhiro Iwamatsu #define __ALT_H
12cff2f5f0SNobuhiro Iwamatsu 
13cff2f5f0SNobuhiro Iwamatsu #undef DEBUG
14cff2f5f0SNobuhiro Iwamatsu #define CONFIG_R8A7794
15cff2f5f0SNobuhiro Iwamatsu #define CONFIG_RMOBILE_BOARD_STRING "Alt"
16cff2f5f0SNobuhiro Iwamatsu 
175ca6dfe6SNobuhiro Iwamatsu #include "rcar-gen2-common.h"
18cff2f5f0SNobuhiro Iwamatsu 
19c9b59bf7SNobuhiro Iwamatsu #if defined(CONFIG_RMOBILE_EXTRAM_BOOT)
20c9b59bf7SNobuhiro Iwamatsu #define CONFIG_SYS_TEXT_BASE	0x70000000
21c9b59bf7SNobuhiro Iwamatsu #else
22cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SYS_TEXT_BASE	0xE6304000
23c9b59bf7SNobuhiro Iwamatsu #endif
24cff2f5f0SNobuhiro Iwamatsu 
25c9b59bf7SNobuhiro Iwamatsu #if defined(CONFIG_RMOBILE_EXTRAM_BOOT)
26c9b59bf7SNobuhiro Iwamatsu #define CONFIG_SYS_INIT_SP_ADDR		0x7003FFFC
27c9b59bf7SNobuhiro Iwamatsu #else
28cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SYS_INIT_SP_ADDR		0xE633FFFC
29c9b59bf7SNobuhiro Iwamatsu #endif
30cff2f5f0SNobuhiro Iwamatsu #define STACK_AREA_SIZE			0xC000
31cff2f5f0SNobuhiro Iwamatsu #define LOW_LEVEL_MERAM_STACK \
32cff2f5f0SNobuhiro Iwamatsu 		(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
33cff2f5f0SNobuhiro Iwamatsu 
34cff2f5f0SNobuhiro Iwamatsu /* MEMORY */
355ca6dfe6SNobuhiro Iwamatsu #define RCAR_GEN2_SDRAM_BASE		0x40000000
365ca6dfe6SNobuhiro Iwamatsu #define RCAR_GEN2_SDRAM_SIZE		(1024u * 1024 * 1024)
375ca6dfe6SNobuhiro Iwamatsu #define RCAR_GEN2_UBOOT_SDRAM_SIZE	(512 * 1024 * 1024)
38cff2f5f0SNobuhiro Iwamatsu 
39cff2f5f0SNobuhiro Iwamatsu /* SCIF */
40cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SCIF_CONSOLE
41cff2f5f0SNobuhiro Iwamatsu 
42cff2f5f0SNobuhiro Iwamatsu /* FLASH */
43cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SPI
44cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SPI_FLASH_BAR
45cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SH_QSPI
46cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SPI_FLASH
47cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SPI_FLASH_SPANSION
48cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SPI_FLASH_QUAD
49cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SYS_NO_FLASH
50cff2f5f0SNobuhiro Iwamatsu 
51cff2f5f0SNobuhiro Iwamatsu /* SH Ether */
52cff2f5f0SNobuhiro Iwamatsu #define	CONFIG_NET_MULTI
53cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SH_ETHER
54cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SH_ETHER_USE_PORT	0
55cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SH_ETHER_PHY_ADDR	0x1
56cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
57cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SH_ETHER_CACHE_WRITEBACK
58cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SH_ETHER_CACHE_INVALIDATE
59cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SH_ETHER_ALIGNE_SIZE 64
60cff2f5f0SNobuhiro Iwamatsu #define CONFIG_PHYLIB
61cff2f5f0SNobuhiro Iwamatsu #define CONFIG_PHY_MICREL
62cff2f5f0SNobuhiro Iwamatsu #define CONFIG_BITBANGMII
63cff2f5f0SNobuhiro Iwamatsu #define CONFIG_BITBANGMII_MULTI
64cff2f5f0SNobuhiro Iwamatsu 
65cff2f5f0SNobuhiro Iwamatsu /* Board Clock */
66cff2f5f0SNobuhiro Iwamatsu #define RMOBILE_XTAL_CLK        20000000u
67cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SYS_CLK_FREQ     RMOBILE_XTAL_CLK
68cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SH_TMU_CLK_FREQ  (CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */
69cff2f5f0SNobuhiro Iwamatsu #define CONFIG_PLL1_CLK_FREQ    (CONFIG_SYS_CLK_FREQ * 156 / 2)
70cff2f5f0SNobuhiro Iwamatsu #define CONFIG_P_CLK_FREQ	(CONFIG_PLL1_CLK_FREQ / 24)
71cff2f5f0SNobuhiro Iwamatsu 
72cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SYS_TMU_CLK_DIV  4
73cff2f5f0SNobuhiro Iwamatsu 
74cff2f5f0SNobuhiro Iwamatsu /* i2c */
75cff2f5f0SNobuhiro Iwamatsu #define CONFIG_CMD_I2C
76cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SYS_I2C
77cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH
78cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SLAVE		0x7F
79cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS       3
80cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH_SPEED0	400000
81cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH_SPEED1	400000
82cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH_SPEED2	400000
83cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SH_I2C_DATA_HIGH		4
84cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SH_I2C_DATA_LOW		5
85cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SH_I2C_CLOCK		10000000
86cff2f5f0SNobuhiro Iwamatsu 
87cff2f5f0SNobuhiro Iwamatsu #define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
88cff2f5f0SNobuhiro Iwamatsu 
897ffc8dfbSNobuhiro Iwamatsu /* USB */
907ffc8dfbSNobuhiro Iwamatsu #define CONFIG_USB_STORAGE
917ffc8dfbSNobuhiro Iwamatsu #define CONFIG_USB_EHCI
927ffc8dfbSNobuhiro Iwamatsu #define CONFIG_USB_EHCI_RMOBILE
937ffc8dfbSNobuhiro Iwamatsu #define CONFIG_USB_MAX_CONTROLLER_COUNT	2
947ffc8dfbSNobuhiro Iwamatsu 
952b8c0814SNobuhiro Iwamatsu /* MMCIF */
962b8c0814SNobuhiro Iwamatsu #define CONFIG_MMC
972b8c0814SNobuhiro Iwamatsu #define CONFIG_GENERIC_MMC
982b8c0814SNobuhiro Iwamatsu #define CONFIG_CMD_MMC
992b8c0814SNobuhiro Iwamatsu 
1002b8c0814SNobuhiro Iwamatsu #define CONFIG_SH_MMCIF
1012b8c0814SNobuhiro Iwamatsu #define CONFIG_SH_MMCIF_ADDR		0xee200000
1022b8c0814SNobuhiro Iwamatsu #define CONFIG_SH_MMCIF_CLK		48000000
1032b8c0814SNobuhiro Iwamatsu 
1048e2e5886SNobuhiro Iwamatsu /* Module stop status bits */
1058e2e5886SNobuhiro Iwamatsu /* INTC-RT */
1068e2e5886SNobuhiro Iwamatsu #define CONFIG_SMSTP0_ENA	0x00400000
1078e2e5886SNobuhiro Iwamatsu /* MSIF */
1088e2e5886SNobuhiro Iwamatsu #define CONFIG_SMSTP2_ENA	0x00002000
1098e2e5886SNobuhiro Iwamatsu /* INTC-SYS, IRQC */
1108e2e5886SNobuhiro Iwamatsu #define CONFIG_SMSTP4_ENA	0x00000180
1118e2e5886SNobuhiro Iwamatsu /* SCIF2 */
1128e2e5886SNobuhiro Iwamatsu #define CONFIG_SMSTP7_ENA	0x00080000
1138e2e5886SNobuhiro Iwamatsu 
114*25f9613fSNobuhiro Iwamatsu /* SDHI */
115*25f9613fSNobuhiro Iwamatsu #define CONFIG_SH_SDHI_FREQ		97500000
116*25f9613fSNobuhiro Iwamatsu 
117cff2f5f0SNobuhiro Iwamatsu #endif /* __ALT_H */
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