1 /*
2  * Copyright (C) 2016 Timesys Corporation
3  * Copyright (C) 2016 Advantech Corporation
4  * Copyright (C) 2012 Freescale Semiconductor, Inc.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __ADVANTECH_DMSBA16_CONFIG_H
10 #define __ADVANTECH_DMSBA16_CONFIG_H
11 
12 #include <asm/arch/imx-regs.h>
13 #include <asm/mach-imx/gpio.h>
14 
15 #define CONFIG_BOARD_NAME	"Advantech DMS-BA16"
16 
17 #define CONFIG_MXC_UART_BASE	UART4_BASE
18 #define CONSOLE_DEV	"ttymxc3"
19 #define CONFIG_EXTRA_BOOTARGS	"panic=10"
20 
21 #define CONFIG_BOOT_DIR	""
22 #define CONFIG_LOADCMD "fatload"
23 #define CONFIG_RFSPART "2"
24 
25 #define CONFIG_SUPPORT_EMMC_BOOT
26 
27 #include "mx6_common.h"
28 #include <linux/sizes.h>
29 
30 #define CONFIG_CMDLINE_TAG
31 #define CONFIG_SETUP_MEMORY_TAGS
32 #define CONFIG_INITRD_TAG
33 #define CONFIG_REVISION_TAG
34 #define CONFIG_SYS_MALLOC_LEN		(10 * SZ_1M)
35 
36 #define CONFIG_MXC_GPIO
37 #define CONFIG_MXC_UART
38 
39 #define CONFIG_MXC_OCOTP
40 
41 /* SATA Configs */
42 #define CONFIG_DWC_AHSATA
43 #define CONFIG_SYS_SATA_MAX_DEVICE	1
44 #define CONFIG_DWC_AHSATA_PORT_ID	0
45 #define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
46 #define CONFIG_LBA48
47 #define CONFIG_LIBATA
48 
49 /* MMC Configs */
50 #define CONFIG_FSL_ESDHC
51 #define CONFIG_FSL_USDHC
52 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
53 #define CONFIG_BOUNCE_BUFFER
54 
55 /* USB Configs */
56 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
57 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
58 #define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
59 #define CONFIG_MXC_USB_FLAGS	0
60 
61 #define CONFIG_USBD_HS
62 #define CONFIG_USB_FUNCTION_MASS_STORAGE
63 
64 /* Networking Configs */
65 #define CONFIG_FEC_MXC
66 #define CONFIG_MII
67 #define IMX_FEC_BASE			ENET_BASE_ADDR
68 #define CONFIG_FEC_XCV_TYPE		RGMII
69 #define CONFIG_ETHPRIME		"FEC"
70 #define CONFIG_FEC_MXC_PHYADDR		4
71 #define CONFIG_PHY_ATHEROS
72 
73 /* Serial Flash */
74 #ifdef CONFIG_CMD_SF
75 #define CONFIG_MXC_SPI
76 #define CONFIG_SF_DEFAULT_BUS		0
77 #define CONFIG_SF_DEFAULT_CS		0
78 #define CONFIG_SF_DEFAULT_SPEED	20000000
79 #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
80 #endif
81 
82 /* allow to overwrite serial and ethaddr */
83 #define CONFIG_ENV_OVERWRITE
84 #define CONFIG_CONS_INDEX	1
85 
86 #define CONFIG_LOADADDR	0x12000000
87 #define CONFIG_SYS_TEXT_BASE	0x17800000
88 
89 #define CONFIG_EXTRA_ENV_SETTINGS \
90 	"script=boot.scr\0" \
91 	"image=" CONFIG_BOOT_DIR "/uImage\0" \
92 	"uboot=u-boot.imx\0" \
93 	"fdt_file=" CONFIG_BOOT_DIR "/" CONFIG_DEFAULT_FDT_FILE "\0" \
94 	"fdt_addr=0x18000000\0" \
95 	"boot_fdt=yes\0" \
96 	"ip_dyn=yes\0" \
97 	"console=" CONSOLE_DEV "\0" \
98 	"fdt_high=0xffffffff\0"	  \
99 	"initrd_high=0xffffffff\0" \
100 	"sddev=0\0" \
101 	"emmcdev=1\0" \
102 	"partnum=1\0" \
103 	"loadcmd=" CONFIG_LOADCMD "\0" \
104 	"rfspart=" CONFIG_RFSPART "\0" \
105 	"update_sd_firmware=" \
106 		"if test ${ip_dyn} = yes; then " \
107 			"setenv get_cmd dhcp; " \
108 		"else " \
109 			"setenv get_cmd tftp; " \
110 		"fi; " \
111 		"if mmc dev ${mmcdev}; then "	\
112 			"if ${get_cmd} ${update_sd_firmware_filename}; then " \
113 				"setexpr fw_sz ${filesize} / 0x200; " \
114 				"setexpr fw_sz ${fw_sz} + 1; "	\
115 				"mmc write ${loadaddr} 0x2 ${fw_sz}; " \
116 			"fi; "	\
117 		"fi\0" \
118 	"update_sf_uboot=" \
119 		"if tftp $loadaddr $uboot; then " \
120 			"sf probe; " \
121 			"sf erase 0 0xC0000; " \
122 			"sf write $loadaddr 0x400 $filesize; " \
123 			"echo 'U-Boot upgraded. Please reset'; " \
124 		"fi\0" \
125 	"setargs=setenv bootargs console=${console},${baudrate} " \
126 		"root=/dev/${rootdev} rw rootwait " CONFIG_EXTRA_BOOTARGS "\0" \
127 	"loadbootscript=" \
128 		"${loadcmd} ${dev} ${devnum}:${partnum} ${loadaddr} ${script};\0" \
129 	"bootscript=echo Running bootscript from ${dev}:${devnum}:${partnum};" \
130 		" source\0" \
131 	"loadimage=" \
132 		"${loadcmd} ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \
133 	"loadfdt=${loadcmd} ${dev} ${devnum}:${partnum} ${fdt_addr} ${fdt_file}\0" \
134 	"tryboot=" \
135 		"if run loadbootscript; then " \
136 			"run bootscript; " \
137 		"else " \
138 			"if run loadimage; then " \
139 				"run doboot; " \
140 			"fi; " \
141 		"fi;\0" \
142 	"doboot=echo Booting from ${dev}:${devnum}:${partnum} ...; " \
143 		"run setargs; " \
144 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
145 			"if run loadfdt; then " \
146 				"bootm ${loadaddr} - ${fdt_addr}; " \
147 			"else " \
148 				"if test ${boot_fdt} = try; then " \
149 					"bootm; " \
150 				"else " \
151 					"echo WARN: Cannot load the DT; " \
152 				"fi; " \
153 			"fi; " \
154 		"else " \
155 			"bootm; " \
156 		"fi;\0" \
157 	"netargs=setenv bootargs console=${console},${baudrate} " \
158 		"root=/dev/nfs " \
159 		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
160 	"netboot=echo Booting from net ...; " \
161 		"run netargs; " \
162 		"if test ${ip_dyn} = yes; then " \
163 			"setenv get_cmd dhcp; " \
164 		"else " \
165 			"setenv get_cmd tftp; " \
166 		"fi; " \
167 		"${get_cmd} ${image}; " \
168 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
169 			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
170 				"bootm ${loadaddr} - ${fdt_addr}; " \
171 			"else " \
172 				"if test ${boot_fdt} = try; then " \
173 					"bootm; " \
174 				"else " \
175 					"echo WARN: Cannot load the DT; " \
176 				"fi; " \
177 			"fi; " \
178 		"else " \
179 			"bootm; " \
180 		"fi;\0" \
181 
182 #define CONFIG_BOOTCOMMAND \
183 	"usb start; " \
184 	"setenv dev usb; " \
185 	"setenv devnum 0; " \
186 	"setenv rootdev sda${rfspart}; " \
187 	"run tryboot; " \
188 	\
189 	"setenv dev mmc; " \
190 	"setenv rootdev mmcblk0p${rfspart}; " \
191 	\
192 	"setenv devnum ${sddev}; " \
193 	"if mmc dev ${devnum}; then " \
194 		"run tryboot; " \
195 	"fi; " \
196 	\
197 	"setenv devnum ${emmcdev}; " \
198 	"setenv rootdev mmcblk${emmcdev}p${rfspart}; " \
199 	"if mmc dev ${devnum}; then " \
200 		"run tryboot; " \
201 	"fi; " \
202 	\
203 	"bmode usb; " \
204 
205 #define CONFIG_ARP_TIMEOUT     200UL
206 
207 /* Miscellaneous configurable options */
208 #define CONFIG_SYS_LONGHELP
209 #define CONFIG_AUTO_COMPLETE
210 
211 #define CONFIG_SYS_MEMTEST_START       0x10000000
212 #define CONFIG_SYS_MEMTEST_END         0x10010000
213 #define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000
214 
215 #define CONFIG_SYS_LOAD_ADDR           CONFIG_LOADADDR
216 
217 #define CONFIG_CMDLINE_EDITING
218 
219 /* Physical Memory Map */
220 #define CONFIG_NR_DRAM_BANKS           1
221 #define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR
222 
223 #define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM
224 #define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
225 #define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
226 
227 #define CONFIG_SYS_INIT_SP_OFFSET \
228 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
229 #define CONFIG_SYS_INIT_SP_ADDR \
230 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
231 
232 /* FLASH and environment organization */
233 
234 #define CONFIG_ENV_SIZE                 (8 * 1024)
235 #define CONFIG_ENV_OFFSET               (768 * 1024)
236 #define CONFIG_ENV_SECT_SIZE            (64 * 1024)
237 #define CONFIG_ENV_SPI_BUS              CONFIG_SF_DEFAULT_BUS
238 #define CONFIG_ENV_SPI_CS               CONFIG_SF_DEFAULT_CS
239 #define CONFIG_ENV_SPI_MODE             CONFIG_SF_DEFAULT_MODE
240 #define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
241 
242 #ifndef CONFIG_SYS_DCACHE_OFF
243 #endif
244 
245 #define CONFIG_SYS_FSL_USDHC_NUM        3
246 
247 /* Framebuffer */
248 #ifdef CONFIG_VIDEO
249 #define CONFIG_VIDEO_IPUV3
250 #define CONFIG_VIDEO_BMP_RLE8
251 #define CONFIG_SPLASH_SCREEN
252 #define CONFIG_SPLASH_SCREEN_ALIGN
253 #define CONFIG_BMP_16BPP
254 #define CONFIG_VIDEO_LOGO
255 #define CONFIG_VIDEO_BMP_LOGO
256 #define CONFIG_IMX_HDMI
257 #define CONFIG_IMX_VIDEO_SKIP
258 #endif
259 
260 #define CONFIG_PWM_IMX
261 #define CONFIG_IMX6_PWM_PER_CLK         66000000
262 
263 #ifdef CONFIG_CMD_PCI
264 #define CONFIG_PCI_SCAN_SHOW
265 #define CONFIG_PCIE_IMX
266 #define CONFIG_PCIE_IMX_PERST_GPIO      IMX_GPIO_NR(7, 12)
267 #define CONFIG_PCIE_IMX_POWER_GPIO      IMX_GPIO_NR(1, 5)
268 #endif
269 
270 /* I2C Configs */
271 #define CONFIG_SYS_I2C
272 #define CONFIG_SYS_I2C_MXC
273 #define CONFIG_SYS_I2C_SPEED            100000
274 #define CONFIG_SYS_I2C_MXC_I2C1
275 #define CONFIG_SYS_I2C_MXC_I2C2
276 #define CONFIG_SYS_I2C_MXC_I2C3
277 
278 #endif	/* __ADVANTECH_DMSBA16_CONFIG_H */
279