1 /*
2  * Copyright (C) 2016 Timesys Corporation
3  * Copyright (C) 2016 Advantech Corporation
4  * Copyright (C) 2012 Freescale Semiconductor, Inc.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __ADVANTECH_DMSBA16_CONFIG_H
10 #define __ADVANTECH_DMSBA16_CONFIG_H
11 
12 #include <asm/arch/imx-regs.h>
13 #include <asm/mach-imx/gpio.h>
14 
15 #define CONFIG_BOARD_NAME	"Advantech DMS-BA16"
16 
17 #define CONFIG_MXC_UART_BASE	UART4_BASE
18 #define CONSOLE_DEV	"ttymxc3"
19 #define CONFIG_EXTRA_BOOTARGS	"panic=10"
20 
21 #define CONFIG_BOOT_DIR	""
22 #define CONFIG_LOADCMD "fatload"
23 #define CONFIG_RFSPART "2"
24 
25 #define CONFIG_SUPPORT_EMMC_BOOT
26 
27 #include "mx6_common.h"
28 #include <linux/sizes.h>
29 
30 #define CONFIG_CMDLINE_TAG
31 #define CONFIG_SETUP_MEMORY_TAGS
32 #define CONFIG_INITRD_TAG
33 #define CONFIG_REVISION_TAG
34 #define CONFIG_SYS_MALLOC_LEN		(10 * SZ_1M)
35 
36 #define CONFIG_MXC_UART
37 
38 #define CONFIG_MXC_OCOTP
39 
40 /* SATA Configs */
41 #define CONFIG_SYS_SATA_MAX_DEVICE	1
42 #define CONFIG_DWC_AHSATA_PORT_ID	0
43 #define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
44 #define CONFIG_LBA48
45 
46 /* MMC Configs */
47 #define CONFIG_FSL_ESDHC
48 #define CONFIG_FSL_USDHC
49 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
50 #define CONFIG_BOUNCE_BUFFER
51 
52 /* USB Configs */
53 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
54 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
55 #define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
56 #define CONFIG_MXC_USB_FLAGS	0
57 
58 #define CONFIG_USBD_HS
59 
60 /* Networking Configs */
61 #define CONFIG_FEC_MXC
62 #define CONFIG_MII
63 #define IMX_FEC_BASE			ENET_BASE_ADDR
64 #define CONFIG_FEC_XCV_TYPE		RGMII
65 #define CONFIG_ETHPRIME		"FEC"
66 #define CONFIG_FEC_MXC_PHYADDR		4
67 #define CONFIG_PHY_ATHEROS
68 
69 /* Serial Flash */
70 #ifdef CONFIG_CMD_SF
71 #define CONFIG_SF_DEFAULT_BUS		0
72 #define CONFIG_SF_DEFAULT_CS		0
73 #define CONFIG_SF_DEFAULT_SPEED	20000000
74 #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
75 #endif
76 
77 /* allow to overwrite serial and ethaddr */
78 #define CONFIG_ENV_OVERWRITE
79 #define CONFIG_CONS_INDEX	1
80 
81 #define CONFIG_LOADADDR	0x12000000
82 
83 #define CONFIG_EXTRA_ENV_SETTINGS \
84 	"script=boot.scr\0" \
85 	"image=" CONFIG_BOOT_DIR "/uImage\0" \
86 	"uboot=u-boot.imx\0" \
87 	"fdt_file=" CONFIG_BOOT_DIR "/" CONFIG_DEFAULT_FDT_FILE "\0" \
88 	"fdt_addr=0x18000000\0" \
89 	"boot_fdt=yes\0" \
90 	"ip_dyn=yes\0" \
91 	"console=" CONSOLE_DEV "\0" \
92 	"fdt_high=0xffffffff\0"	  \
93 	"initrd_high=0xffffffff\0" \
94 	"sddev=0\0" \
95 	"emmcdev=1\0" \
96 	"partnum=1\0" \
97 	"loadcmd=" CONFIG_LOADCMD "\0" \
98 	"rfspart=" CONFIG_RFSPART "\0" \
99 	"update_sd_firmware=" \
100 		"if test ${ip_dyn} = yes; then " \
101 			"setenv get_cmd dhcp; " \
102 		"else " \
103 			"setenv get_cmd tftp; " \
104 		"fi; " \
105 		"if mmc dev ${mmcdev}; then "	\
106 			"if ${get_cmd} ${update_sd_firmware_filename}; then " \
107 				"setexpr fw_sz ${filesize} / 0x200; " \
108 				"setexpr fw_sz ${fw_sz} + 1; "	\
109 				"mmc write ${loadaddr} 0x2 ${fw_sz}; " \
110 			"fi; "	\
111 		"fi\0" \
112 	"update_sf_uboot=" \
113 		"if tftp $loadaddr $uboot; then " \
114 			"sf probe; " \
115 			"sf erase 0 0xC0000; " \
116 			"sf write $loadaddr 0x400 $filesize; " \
117 			"echo 'U-Boot upgraded. Please reset'; " \
118 		"fi\0" \
119 	"setargs=setenv bootargs console=${console},${baudrate} " \
120 		"root=/dev/${rootdev} rw rootwait " CONFIG_EXTRA_BOOTARGS "\0" \
121 	"loadbootscript=" \
122 		"${loadcmd} ${dev} ${devnum}:${partnum} ${loadaddr} ${script};\0" \
123 	"bootscript=echo Running bootscript from ${dev}:${devnum}:${partnum};" \
124 		" source\0" \
125 	"loadimage=" \
126 		"${loadcmd} ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \
127 	"loadfdt=${loadcmd} ${dev} ${devnum}:${partnum} ${fdt_addr} ${fdt_file}\0" \
128 	"tryboot=" \
129 		"if run loadbootscript; then " \
130 			"run bootscript; " \
131 		"else " \
132 			"if run loadimage; then " \
133 				"run doboot; " \
134 			"fi; " \
135 		"fi;\0" \
136 	"doboot=echo Booting from ${dev}:${devnum}:${partnum} ...; " \
137 		"run setargs; " \
138 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
139 			"if run loadfdt; then " \
140 				"bootm ${loadaddr} - ${fdt_addr}; " \
141 			"else " \
142 				"if test ${boot_fdt} = try; then " \
143 					"bootm; " \
144 				"else " \
145 					"echo WARN: Cannot load the DT; " \
146 				"fi; " \
147 			"fi; " \
148 		"else " \
149 			"bootm; " \
150 		"fi;\0" \
151 	"netargs=setenv bootargs console=${console},${baudrate} " \
152 		"root=/dev/nfs " \
153 		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
154 	"netboot=echo Booting from net ...; " \
155 		"run netargs; " \
156 		"if test ${ip_dyn} = yes; then " \
157 			"setenv get_cmd dhcp; " \
158 		"else " \
159 			"setenv get_cmd tftp; " \
160 		"fi; " \
161 		"${get_cmd} ${image}; " \
162 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
163 			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
164 				"bootm ${loadaddr} - ${fdt_addr}; " \
165 			"else " \
166 				"if test ${boot_fdt} = try; then " \
167 					"bootm; " \
168 				"else " \
169 					"echo WARN: Cannot load the DT; " \
170 				"fi; " \
171 			"fi; " \
172 		"else " \
173 			"bootm; " \
174 		"fi;\0" \
175 
176 #define CONFIG_BOOTCOMMAND \
177 	"usb start; " \
178 	"setenv dev usb; " \
179 	"setenv devnum 0; " \
180 	"setenv rootdev sda${rfspart}; " \
181 	"run tryboot; " \
182 	\
183 	"setenv dev mmc; " \
184 	"setenv rootdev mmcblk0p${rfspart}; " \
185 	\
186 	"setenv devnum ${sddev}; " \
187 	"if mmc dev ${devnum}; then " \
188 		"run tryboot; " \
189 	"fi; " \
190 	\
191 	"setenv devnum ${emmcdev}; " \
192 	"setenv rootdev mmcblk${emmcdev}p${rfspart}; " \
193 	"if mmc dev ${devnum}; then " \
194 		"run tryboot; " \
195 	"fi; " \
196 	\
197 	"bmode usb; " \
198 
199 #define CONFIG_ARP_TIMEOUT     200UL
200 
201 /* Miscellaneous configurable options */
202 
203 #define CONFIG_SYS_MEMTEST_START       0x10000000
204 #define CONFIG_SYS_MEMTEST_END         0x10010000
205 #define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000
206 
207 #define CONFIG_SYS_LOAD_ADDR           CONFIG_LOADADDR
208 
209 /* Physical Memory Map */
210 #define CONFIG_NR_DRAM_BANKS           1
211 #define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR
212 
213 #define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM
214 #define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
215 #define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
216 
217 #define CONFIG_SYS_INIT_SP_OFFSET \
218 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
219 #define CONFIG_SYS_INIT_SP_ADDR \
220 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
221 
222 /* FLASH and environment organization */
223 
224 #define CONFIG_ENV_SIZE                 (8 * 1024)
225 #define CONFIG_ENV_OFFSET               (768 * 1024)
226 #define CONFIG_ENV_SECT_SIZE            (64 * 1024)
227 #define CONFIG_ENV_SPI_BUS              CONFIG_SF_DEFAULT_BUS
228 #define CONFIG_ENV_SPI_CS               CONFIG_SF_DEFAULT_CS
229 #define CONFIG_ENV_SPI_MODE             CONFIG_SF_DEFAULT_MODE
230 #define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
231 
232 #ifndef CONFIG_SYS_DCACHE_OFF
233 #endif
234 
235 #define CONFIG_SYS_FSL_USDHC_NUM        3
236 
237 /* Framebuffer */
238 #ifdef CONFIG_VIDEO
239 #define CONFIG_VIDEO_IPUV3
240 #define CONFIG_VIDEO_BMP_RLE8
241 #define CONFIG_SPLASH_SCREEN
242 #define CONFIG_SPLASH_SCREEN_ALIGN
243 #define CONFIG_BMP_16BPP
244 #define CONFIG_VIDEO_LOGO
245 #define CONFIG_VIDEO_BMP_LOGO
246 #define CONFIG_IMX_HDMI
247 #define CONFIG_IMX_VIDEO_SKIP
248 #endif
249 
250 #define CONFIG_PWM_IMX
251 #define CONFIG_IMX6_PWM_PER_CLK         66000000
252 
253 #ifdef CONFIG_CMD_PCI
254 #define CONFIG_PCI_SCAN_SHOW
255 #define CONFIG_PCIE_IMX
256 #define CONFIG_PCIE_IMX_PERST_GPIO      IMX_GPIO_NR(7, 12)
257 #define CONFIG_PCIE_IMX_POWER_GPIO      IMX_GPIO_NR(1, 5)
258 #endif
259 
260 /* I2C Configs */
261 #define CONFIG_SYS_I2C
262 #define CONFIG_SYS_I2C_MXC
263 #define CONFIG_SYS_I2C_SPEED            100000
264 #define CONFIG_SYS_I2C_MXC_I2C1
265 #define CONFIG_SYS_I2C_MXC_I2C2
266 #define CONFIG_SYS_I2C_MXC_I2C3
267 
268 #endif	/* __ADVANTECH_DMSBA16_CONFIG_H */
269