1 /*
2  * Copyright (C) 2016 Timesys Corporation
3  * Copyright (C) 2016 Advantech Corporation
4  * Copyright (C) 2012 Freescale Semiconductor, Inc.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __ADVANTECH_DMSBA16_CONFIG_H
10 #define __ADVANTECH_DMSBA16_CONFIG_H
11 
12 #include <asm/arch/imx-regs.h>
13 #include <asm/imx-common/gpio.h>
14 
15 #define CONFIG_BOARD_NAME	"Advantech DMS-BA16"
16 
17 #define CONFIG_MXC_UART_BASE	UART4_BASE
18 #define CONSOLE_DEV	"ttymxc3"
19 #define CONFIG_EXTRA_BOOTARGS	"panic=10"
20 
21 #define CONFIG_BOOT_DIR	""
22 #define CONFIG_LOADCMD "fatload"
23 #define CONFIG_RFSPART "2"
24 
25 #define CONFIG_SUPPORT_EMMC_BOOT
26 
27 #include "mx6_common.h"
28 #include <linux/sizes.h>
29 
30 #define CONFIG_CMDLINE_TAG
31 #define CONFIG_SETUP_MEMORY_TAGS
32 #define CONFIG_INITRD_TAG
33 #define CONFIG_REVISION_TAG
34 #define CONFIG_SYS_MALLOC_LEN		(10 * SZ_1M)
35 
36 #define CONFIG_MXC_GPIO
37 #define CONFIG_MXC_UART
38 
39 #define CONFIG_CMD_FUSE
40 #define CONFIG_MXC_OCOTP
41 
42 /* SATA Configs */
43 #define CONFIG_CMD_SATA
44 #define CONFIG_DWC_AHSATA
45 #define CONFIG_SYS_SATA_MAX_DEVICE	1
46 #define CONFIG_DWC_AHSATA_PORT_ID	0
47 #define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
48 #define CONFIG_LBA48
49 #define CONFIG_LIBATA
50 
51 /* MMC Configs */
52 #define CONFIG_FSL_ESDHC
53 #define CONFIG_FSL_USDHC
54 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
55 #define CONFIG_GENERIC_MMC
56 #define CONFIG_BOUNCE_BUFFER
57 #define CONFIG_DOS_PARTITION
58 
59 /* USB Configs */
60 #define CONFIG_USB_EHCI
61 #define CONFIG_USB_EHCI_MX6
62 #define CONFIG_USB_STORAGE
63 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
64 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
65 #define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
66 #define CONFIG_MXC_USB_FLAGS	0
67 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
68 
69 #define CONFIG_USBD_HS
70 #define CONFIG_USB_FUNCTION_MASS_STORAGE
71 #define CONFIG_USB_GADGET_VBUS_DRAW 2
72 
73 /* Networking Configs */
74 #define CONFIG_FEC_MXC
75 #define CONFIG_MII
76 #define IMX_FEC_BASE			ENET_BASE_ADDR
77 #define CONFIG_FEC_XCV_TYPE		RGMII
78 #define CONFIG_ETHPRIME		"FEC"
79 #define CONFIG_FEC_MXC_PHYADDR		4
80 #define CONFIG_PHYLIB
81 #define CONFIG_PHY_ATHEROS
82 
83 /* Serial Flash */
84 #ifdef CONFIG_CMD_SF
85 #define CONFIG_MXC_SPI
86 #define CONFIG_SF_DEFAULT_BUS		0
87 #define CONFIG_SF_DEFAULT_CS		0
88 #define CONFIG_SF_DEFAULT_SPEED	20000000
89 #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
90 #endif
91 
92 /* allow to overwrite serial and ethaddr */
93 #define CONFIG_ENV_OVERWRITE
94 #define CONFIG_CONS_INDEX	1
95 #define CONFIG_BAUDRATE	115200
96 
97 /* Command definition */
98 #define CONFIG_CMD_BMODE
99 
100 #define CONFIG_LOADADDR	0x12000000
101 #define CONFIG_SYS_TEXT_BASE	0x17800000
102 
103 #define CONFIG_EXTRA_ENV_SETTINGS \
104 	"script=boot.scr\0" \
105 	"image=" CONFIG_BOOT_DIR "/uImage\0" \
106 	"uboot=u-boot.imx\0" \
107 	"fdt_file=" CONFIG_BOOT_DIR "/" CONFIG_DEFAULT_FDT_FILE "\0" \
108 	"fdt_addr=0x18000000\0" \
109 	"boot_fdt=yes\0" \
110 	"ip_dyn=yes\0" \
111 	"console=" CONSOLE_DEV "\0" \
112 	"fdt_high=0xffffffff\0"	  \
113 	"initrd_high=0xffffffff\0" \
114 	"sddev=0\0" \
115 	"emmcdev=1\0" \
116 	"partnum=1\0" \
117 	"loadcmd=" CONFIG_LOADCMD "\0" \
118 	"rfspart=" CONFIG_RFSPART "\0" \
119 	"update_sd_firmware=" \
120 		"if test ${ip_dyn} = yes; then " \
121 			"setenv get_cmd dhcp; " \
122 		"else " \
123 			"setenv get_cmd tftp; " \
124 		"fi; " \
125 		"if mmc dev ${mmcdev}; then "	\
126 			"if ${get_cmd} ${update_sd_firmware_filename}; then " \
127 				"setexpr fw_sz ${filesize} / 0x200; " \
128 				"setexpr fw_sz ${fw_sz} + 1; "	\
129 				"mmc write ${loadaddr} 0x2 ${fw_sz}; " \
130 			"fi; "	\
131 		"fi\0" \
132 	"update_sf_uboot=" \
133 		"if tftp $loadaddr $uboot; then " \
134 			"sf probe; " \
135 			"sf erase 0 0xC0000; " \
136 			"sf write $loadaddr 0x400 $filesize; " \
137 			"echo 'U-Boot upgraded. Please reset'; " \
138 		"fi\0" \
139 	"setargs=setenv bootargs console=${console},${baudrate} " \
140 		"root=/dev/${rootdev} rw rootwait " CONFIG_EXTRA_BOOTARGS "\0" \
141 	"loadbootscript=" \
142 		"${loadcmd} ${dev} ${devnum}:${partnum} ${loadaddr} ${script};\0" \
143 	"bootscript=echo Running bootscript from ${dev}:${devnum}:${partnum};" \
144 		" source\0" \
145 	"loadimage=" \
146 		"${loadcmd} ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \
147 	"loadfdt=${loadcmd} ${dev} ${devnum}:${partnum} ${fdt_addr} ${fdt_file}\0" \
148 	"tryboot=" \
149 		"if run loadbootscript; then " \
150 			"run bootscript; " \
151 		"else " \
152 			"if run loadimage; then " \
153 				"run doboot; " \
154 			"fi; " \
155 		"fi;\0" \
156 	"doboot=echo Booting from ${dev}:${devnum}:${partnum} ...; " \
157 		"run setargs; " \
158 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
159 			"if run loadfdt; then " \
160 				"bootm ${loadaddr} - ${fdt_addr}; " \
161 			"else " \
162 				"if test ${boot_fdt} = try; then " \
163 					"bootm; " \
164 				"else " \
165 					"echo WARN: Cannot load the DT; " \
166 				"fi; " \
167 			"fi; " \
168 		"else " \
169 			"bootm; " \
170 		"fi;\0" \
171 	"netargs=setenv bootargs console=${console},${baudrate} " \
172 		"root=/dev/nfs " \
173 		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
174 	"netboot=echo Booting from net ...; " \
175 		"run netargs; " \
176 		"if test ${ip_dyn} = yes; then " \
177 			"setenv get_cmd dhcp; " \
178 		"else " \
179 			"setenv get_cmd tftp; " \
180 		"fi; " \
181 		"${get_cmd} ${image}; " \
182 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
183 			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
184 				"bootm ${loadaddr} - ${fdt_addr}; " \
185 			"else " \
186 				"if test ${boot_fdt} = try; then " \
187 					"bootm; " \
188 				"else " \
189 					"echo WARN: Cannot load the DT; " \
190 				"fi; " \
191 			"fi; " \
192 		"else " \
193 			"bootm; " \
194 		"fi;\0" \
195 
196 #define CONFIG_BOOTCOMMAND \
197 	"usb start; " \
198 	"setenv dev usb; " \
199 	"setenv devnum 0; " \
200 	"setenv rootdev sda${rfspart}; " \
201 	"run tryboot; " \
202 	\
203 	"setenv dev mmc; " \
204 	"setenv rootdev mmcblk0p${rfspart}; " \
205 	\
206 	"setenv devnum ${sddev}; " \
207 	"if mmc dev ${devnum}; then " \
208 		"run tryboot; " \
209 	"fi; " \
210 	\
211 	"setenv devnum ${emmcdev}; " \
212 	"setenv rootdev mmcblk${emmcdev}p${rfspart}; " \
213 	"if mmc dev ${devnum}; then " \
214 		"run tryboot; " \
215 	"fi; " \
216 	\
217 	"bmode usb; " \
218 
219 #define CONFIG_ARP_TIMEOUT     200UL
220 
221 /* Miscellaneous configurable options */
222 #define CONFIG_SYS_LONGHELP
223 #define CONFIG_AUTO_COMPLETE
224 
225 /* Print Buffer Size */
226 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
227 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
228 
229 #define CONFIG_SYS_MEMTEST_START       0x10000000
230 #define CONFIG_SYS_MEMTEST_END         0x10010000
231 #define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000
232 
233 #define CONFIG_SYS_LOAD_ADDR           CONFIG_LOADADDR
234 
235 #define CONFIG_CMDLINE_EDITING
236 #define CONFIG_STACKSIZE               (128 * 1024)
237 
238 /* Physical Memory Map */
239 #define CONFIG_NR_DRAM_BANKS           1
240 #define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR
241 
242 #define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM
243 #define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
244 #define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
245 
246 #define CONFIG_SYS_INIT_SP_OFFSET \
247 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
248 #define CONFIG_SYS_INIT_SP_ADDR \
249 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
250 
251 /* FLASH and environment organization */
252 #define CONFIG_SYS_NO_FLASH
253 
254 #define CONFIG_ENV_IS_IN_SPI_FLASH
255 #define CONFIG_ENV_SIZE                 (8 * 1024)
256 #define CONFIG_ENV_OFFSET               (768 * 1024)
257 #define CONFIG_ENV_SECT_SIZE            (64 * 1024)
258 #define CONFIG_ENV_SPI_BUS              CONFIG_SF_DEFAULT_BUS
259 #define CONFIG_ENV_SPI_CS               CONFIG_SF_DEFAULT_CS
260 #define CONFIG_ENV_SPI_MODE             CONFIG_SF_DEFAULT_MODE
261 #define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
262 
263 #ifndef CONFIG_SYS_DCACHE_OFF
264 #endif
265 
266 #define CONFIG_SYS_FSL_USDHC_NUM        3
267 
268 /* Framebuffer */
269 #define CONFIG_VIDEO_IPUV3
270 #define CONFIG_VIDEO_BMP_RLE8
271 #define CONFIG_SPLASH_SCREEN
272 #define CONFIG_SPLASH_SCREEN_ALIGN
273 #define CONFIG_BMP_16BPP
274 #define CONFIG_VIDEO_LOGO
275 #define CONFIG_VIDEO_BMP_LOGO
276 #define CONFIG_IPUV3_CLK                260000000
277 #define CONFIG_IMX_HDMI
278 #define CONFIG_IMX_VIDEO_SKIP
279 
280 #define CONFIG_PWM_IMX
281 #define CONFIG_IMX6_PWM_PER_CLK         66000000
282 
283 #undef CONFIG_CMD_PCI
284 #ifdef CONFIG_CMD_PCI
285 #define CONFIG_PCI_SCAN_SHOW
286 #define CONFIG_PCIE_IMX
287 #define CONFIG_PCIE_IMX_PERST_GPIO      IMX_GPIO_NR(7, 12)
288 #define CONFIG_PCIE_IMX_POWER_GPIO      IMX_GPIO_NR(1, 5)
289 #endif
290 
291 /* I2C Configs */
292 #define CONFIG_SYS_I2C
293 #define CONFIG_SYS_I2C_MXC
294 #define CONFIG_SYS_I2C_SPEED            100000
295 #define CONFIG_SYS_I2C_MXC_I2C1
296 #define CONFIG_SYS_I2C_MXC_I2C2
297 #define CONFIG_SYS_I2C_MXC_I2C3
298 
299 #endif	/* __ADVANTECH_DMSBA16_CONFIG_H */
300