1 /* 2 * Copyright (C) 2016 Timesys Corporation 3 * Copyright (C) 2016 Advantech Corporation 4 * Copyright (C) 2012 Freescale Semiconductor, Inc. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __ADVANTECH_DMSBA16_CONFIG_H 10 #define __ADVANTECH_DMSBA16_CONFIG_H 11 12 #include <asm/arch/imx-regs.h> 13 #include <asm/imx-common/gpio.h> 14 15 #define CONFIG_BOARD_NAME "Advantech DMS-BA16" 16 17 #define CONFIG_MXC_UART_BASE UART4_BASE 18 #define CONSOLE_DEV "ttymxc3" 19 #define CONFIG_EXTRA_BOOTARGS "panic=10" 20 21 #define CONFIG_BOOT_DIR "" 22 #define CONFIG_LOADCMD "fatload" 23 #define CONFIG_RFSPART "2" 24 25 #define CONFIG_SUPPORT_EMMC_BOOT 26 27 #include "mx6_common.h" 28 #include <linux/sizes.h> 29 30 #define CONFIG_CMDLINE_TAG 31 #define CONFIG_SETUP_MEMORY_TAGS 32 #define CONFIG_INITRD_TAG 33 #define CONFIG_REVISION_TAG 34 #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) 35 36 #define CONFIG_MXC_GPIO 37 #define CONFIG_MXC_UART 38 39 #define CONFIG_CMD_FUSE 40 #define CONFIG_MXC_OCOTP 41 42 /* SATA Configs */ 43 #define CONFIG_CMD_SATA 44 #define CONFIG_DWC_AHSATA 45 #define CONFIG_SYS_SATA_MAX_DEVICE 1 46 #define CONFIG_DWC_AHSATA_PORT_ID 0 47 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 48 #define CONFIG_LBA48 49 #define CONFIG_LIBATA 50 51 /* MMC Configs */ 52 #define CONFIG_FSL_ESDHC 53 #define CONFIG_FSL_USDHC 54 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 55 #define CONFIG_BOUNCE_BUFFER 56 57 /* USB Configs */ 58 #define CONFIG_USB_EHCI 59 #define CONFIG_USB_EHCI_MX6 60 #define CONFIG_USB_STORAGE 61 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 62 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 63 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 64 #define CONFIG_MXC_USB_FLAGS 0 65 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP 66 67 #define CONFIG_USBD_HS 68 #define CONFIG_USB_FUNCTION_MASS_STORAGE 69 #define CONFIG_USB_GADGET_VBUS_DRAW 2 70 71 /* Networking Configs */ 72 #define CONFIG_FEC_MXC 73 #define CONFIG_MII 74 #define IMX_FEC_BASE ENET_BASE_ADDR 75 #define CONFIG_FEC_XCV_TYPE RGMII 76 #define CONFIG_ETHPRIME "FEC" 77 #define CONFIG_FEC_MXC_PHYADDR 4 78 #define CONFIG_PHYLIB 79 #define CONFIG_PHY_ATHEROS 80 81 /* Serial Flash */ 82 #ifdef CONFIG_CMD_SF 83 #define CONFIG_MXC_SPI 84 #define CONFIG_SF_DEFAULT_BUS 0 85 #define CONFIG_SF_DEFAULT_CS 0 86 #define CONFIG_SF_DEFAULT_SPEED 20000000 87 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 88 #endif 89 90 /* allow to overwrite serial and ethaddr */ 91 #define CONFIG_ENV_OVERWRITE 92 #define CONFIG_CONS_INDEX 1 93 94 #define CONFIG_LOADADDR 0x12000000 95 #define CONFIG_SYS_TEXT_BASE 0x17800000 96 97 #define CONFIG_EXTRA_ENV_SETTINGS \ 98 "script=boot.scr\0" \ 99 "image=" CONFIG_BOOT_DIR "/uImage\0" \ 100 "uboot=u-boot.imx\0" \ 101 "fdt_file=" CONFIG_BOOT_DIR "/" CONFIG_DEFAULT_FDT_FILE "\0" \ 102 "fdt_addr=0x18000000\0" \ 103 "boot_fdt=yes\0" \ 104 "ip_dyn=yes\0" \ 105 "console=" CONSOLE_DEV "\0" \ 106 "fdt_high=0xffffffff\0" \ 107 "initrd_high=0xffffffff\0" \ 108 "sddev=0\0" \ 109 "emmcdev=1\0" \ 110 "partnum=1\0" \ 111 "loadcmd=" CONFIG_LOADCMD "\0" \ 112 "rfspart=" CONFIG_RFSPART "\0" \ 113 "update_sd_firmware=" \ 114 "if test ${ip_dyn} = yes; then " \ 115 "setenv get_cmd dhcp; " \ 116 "else " \ 117 "setenv get_cmd tftp; " \ 118 "fi; " \ 119 "if mmc dev ${mmcdev}; then " \ 120 "if ${get_cmd} ${update_sd_firmware_filename}; then " \ 121 "setexpr fw_sz ${filesize} / 0x200; " \ 122 "setexpr fw_sz ${fw_sz} + 1; " \ 123 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ 124 "fi; " \ 125 "fi\0" \ 126 "update_sf_uboot=" \ 127 "if tftp $loadaddr $uboot; then " \ 128 "sf probe; " \ 129 "sf erase 0 0xC0000; " \ 130 "sf write $loadaddr 0x400 $filesize; " \ 131 "echo 'U-Boot upgraded. Please reset'; " \ 132 "fi\0" \ 133 "setargs=setenv bootargs console=${console},${baudrate} " \ 134 "root=/dev/${rootdev} rw rootwait " CONFIG_EXTRA_BOOTARGS "\0" \ 135 "loadbootscript=" \ 136 "${loadcmd} ${dev} ${devnum}:${partnum} ${loadaddr} ${script};\0" \ 137 "bootscript=echo Running bootscript from ${dev}:${devnum}:${partnum};" \ 138 " source\0" \ 139 "loadimage=" \ 140 "${loadcmd} ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \ 141 "loadfdt=${loadcmd} ${dev} ${devnum}:${partnum} ${fdt_addr} ${fdt_file}\0" \ 142 "tryboot=" \ 143 "if run loadbootscript; then " \ 144 "run bootscript; " \ 145 "else " \ 146 "if run loadimage; then " \ 147 "run doboot; " \ 148 "fi; " \ 149 "fi;\0" \ 150 "doboot=echo Booting from ${dev}:${devnum}:${partnum} ...; " \ 151 "run setargs; " \ 152 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 153 "if run loadfdt; then " \ 154 "bootm ${loadaddr} - ${fdt_addr}; " \ 155 "else " \ 156 "if test ${boot_fdt} = try; then " \ 157 "bootm; " \ 158 "else " \ 159 "echo WARN: Cannot load the DT; " \ 160 "fi; " \ 161 "fi; " \ 162 "else " \ 163 "bootm; " \ 164 "fi;\0" \ 165 "netargs=setenv bootargs console=${console},${baudrate} " \ 166 "root=/dev/nfs " \ 167 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 168 "netboot=echo Booting from net ...; " \ 169 "run netargs; " \ 170 "if test ${ip_dyn} = yes; then " \ 171 "setenv get_cmd dhcp; " \ 172 "else " \ 173 "setenv get_cmd tftp; " \ 174 "fi; " \ 175 "${get_cmd} ${image}; " \ 176 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 177 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 178 "bootm ${loadaddr} - ${fdt_addr}; " \ 179 "else " \ 180 "if test ${boot_fdt} = try; then " \ 181 "bootm; " \ 182 "else " \ 183 "echo WARN: Cannot load the DT; " \ 184 "fi; " \ 185 "fi; " \ 186 "else " \ 187 "bootm; " \ 188 "fi;\0" \ 189 190 #define CONFIG_BOOTCOMMAND \ 191 "usb start; " \ 192 "setenv dev usb; " \ 193 "setenv devnum 0; " \ 194 "setenv rootdev sda${rfspart}; " \ 195 "run tryboot; " \ 196 \ 197 "setenv dev mmc; " \ 198 "setenv rootdev mmcblk0p${rfspart}; " \ 199 \ 200 "setenv devnum ${sddev}; " \ 201 "if mmc dev ${devnum}; then " \ 202 "run tryboot; " \ 203 "fi; " \ 204 \ 205 "setenv devnum ${emmcdev}; " \ 206 "setenv rootdev mmcblk${emmcdev}p${rfspart}; " \ 207 "if mmc dev ${devnum}; then " \ 208 "run tryboot; " \ 209 "fi; " \ 210 \ 211 "bmode usb; " \ 212 213 #define CONFIG_ARP_TIMEOUT 200UL 214 215 /* Miscellaneous configurable options */ 216 #define CONFIG_SYS_LONGHELP 217 #define CONFIG_AUTO_COMPLETE 218 219 /* Print Buffer Size */ 220 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 221 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 222 223 #define CONFIG_SYS_MEMTEST_START 0x10000000 224 #define CONFIG_SYS_MEMTEST_END 0x10010000 225 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 226 227 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 228 229 #define CONFIG_CMDLINE_EDITING 230 231 /* Physical Memory Map */ 232 #define CONFIG_NR_DRAM_BANKS 1 233 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 234 235 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 236 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 237 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 238 239 #define CONFIG_SYS_INIT_SP_OFFSET \ 240 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 241 #define CONFIG_SYS_INIT_SP_ADDR \ 242 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 243 244 /* FLASH and environment organization */ 245 246 #define CONFIG_ENV_IS_IN_SPI_FLASH 247 #define CONFIG_ENV_SIZE (8 * 1024) 248 #define CONFIG_ENV_OFFSET (768 * 1024) 249 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 250 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 251 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 252 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 253 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 254 255 #ifndef CONFIG_SYS_DCACHE_OFF 256 #endif 257 258 #define CONFIG_SYS_FSL_USDHC_NUM 3 259 260 /* Framebuffer */ 261 #ifdef CONFIG_VIDEO 262 #define CONFIG_VIDEO_IPUV3 263 #define CONFIG_VIDEO_BMP_RLE8 264 #define CONFIG_SPLASH_SCREEN 265 #define CONFIG_SPLASH_SCREEN_ALIGN 266 #define CONFIG_BMP_16BPP 267 #define CONFIG_VIDEO_LOGO 268 #define CONFIG_VIDEO_BMP_LOGO 269 #define CONFIG_IPUV3_CLK 260000000 270 #define CONFIG_IMX_HDMI 271 #define CONFIG_IMX_VIDEO_SKIP 272 #endif 273 274 #define CONFIG_PWM_IMX 275 #define CONFIG_IMX6_PWM_PER_CLK 66000000 276 277 #undef CONFIG_CMD_PCI 278 #ifdef CONFIG_CMD_PCI 279 #define CONFIG_PCI_SCAN_SHOW 280 #define CONFIG_PCIE_IMX 281 #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) 282 #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(1, 5) 283 #endif 284 285 /* I2C Configs */ 286 #define CONFIG_SYS_I2C 287 #define CONFIG_SYS_I2C_MXC 288 #define CONFIG_SYS_I2C_SPEED 100000 289 #define CONFIG_SYS_I2C_MXC_I2C1 290 #define CONFIG_SYS_I2C_MXC_I2C2 291 #define CONFIG_SYS_I2C_MXC_I2C3 292 293 #endif /* __ADVANTECH_DMSBA16_CONFIG_H */ 294