1 /* 2 * Copyright (C) 2016 Timesys Corporation 3 * Copyright (C) 2016 Advantech Corporation 4 * Copyright (C) 2012 Freescale Semiconductor, Inc. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __ADVANTECH_DMSBA16_CONFIG_H 10 #define __ADVANTECH_DMSBA16_CONFIG_H 11 12 #include <asm/arch/imx-regs.h> 13 #include <asm/mach-imx/gpio.h> 14 15 #define CONFIG_BOARD_NAME "Advantech DMS-BA16" 16 17 #define CONFIG_MXC_UART_BASE UART4_BASE 18 #define CONSOLE_DEV "ttymxc3" 19 #define CONFIG_EXTRA_BOOTARGS "panic=10" 20 21 #define CONFIG_BOOT_DIR "" 22 #define CONFIG_LOADCMD "fatload" 23 #define CONFIG_RFSPART "2" 24 25 #define CONFIG_SUPPORT_EMMC_BOOT 26 27 #include "mx6_common.h" 28 #include <linux/sizes.h> 29 30 #define CONFIG_CMDLINE_TAG 31 #define CONFIG_SETUP_MEMORY_TAGS 32 #define CONFIG_INITRD_TAG 33 #define CONFIG_REVISION_TAG 34 #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) 35 36 #define CONFIG_MXC_GPIO 37 #define CONFIG_MXC_UART 38 39 #define CONFIG_MXC_OCOTP 40 41 /* SATA Configs */ 42 #define CONFIG_DWC_AHSATA 43 #define CONFIG_SYS_SATA_MAX_DEVICE 1 44 #define CONFIG_DWC_AHSATA_PORT_ID 0 45 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 46 #define CONFIG_LBA48 47 #define CONFIG_LIBATA 48 49 /* MMC Configs */ 50 #define CONFIG_FSL_ESDHC 51 #define CONFIG_FSL_USDHC 52 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 53 #define CONFIG_BOUNCE_BUFFER 54 55 /* USB Configs */ 56 #define CONFIG_USB_STORAGE 57 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 58 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 59 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 60 #define CONFIG_MXC_USB_FLAGS 0 61 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP 62 63 #define CONFIG_USBD_HS 64 #define CONFIG_USB_FUNCTION_MASS_STORAGE 65 #define CONFIG_USB_GADGET_VBUS_DRAW 2 66 67 /* Networking Configs */ 68 #define CONFIG_FEC_MXC 69 #define CONFIG_MII 70 #define IMX_FEC_BASE ENET_BASE_ADDR 71 #define CONFIG_FEC_XCV_TYPE RGMII 72 #define CONFIG_ETHPRIME "FEC" 73 #define CONFIG_FEC_MXC_PHYADDR 4 74 #define CONFIG_PHY_ATHEROS 75 76 /* Serial Flash */ 77 #ifdef CONFIG_CMD_SF 78 #define CONFIG_MXC_SPI 79 #define CONFIG_SF_DEFAULT_BUS 0 80 #define CONFIG_SF_DEFAULT_CS 0 81 #define CONFIG_SF_DEFAULT_SPEED 20000000 82 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 83 #endif 84 85 /* allow to overwrite serial and ethaddr */ 86 #define CONFIG_ENV_OVERWRITE 87 #define CONFIG_CONS_INDEX 1 88 89 #define CONFIG_LOADADDR 0x12000000 90 #define CONFIG_SYS_TEXT_BASE 0x17800000 91 92 #define CONFIG_EXTRA_ENV_SETTINGS \ 93 "script=boot.scr\0" \ 94 "image=" CONFIG_BOOT_DIR "/uImage\0" \ 95 "uboot=u-boot.imx\0" \ 96 "fdt_file=" CONFIG_BOOT_DIR "/" CONFIG_DEFAULT_FDT_FILE "\0" \ 97 "fdt_addr=0x18000000\0" \ 98 "boot_fdt=yes\0" \ 99 "ip_dyn=yes\0" \ 100 "console=" CONSOLE_DEV "\0" \ 101 "fdt_high=0xffffffff\0" \ 102 "initrd_high=0xffffffff\0" \ 103 "sddev=0\0" \ 104 "emmcdev=1\0" \ 105 "partnum=1\0" \ 106 "loadcmd=" CONFIG_LOADCMD "\0" \ 107 "rfspart=" CONFIG_RFSPART "\0" \ 108 "update_sd_firmware=" \ 109 "if test ${ip_dyn} = yes; then " \ 110 "setenv get_cmd dhcp; " \ 111 "else " \ 112 "setenv get_cmd tftp; " \ 113 "fi; " \ 114 "if mmc dev ${mmcdev}; then " \ 115 "if ${get_cmd} ${update_sd_firmware_filename}; then " \ 116 "setexpr fw_sz ${filesize} / 0x200; " \ 117 "setexpr fw_sz ${fw_sz} + 1; " \ 118 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ 119 "fi; " \ 120 "fi\0" \ 121 "update_sf_uboot=" \ 122 "if tftp $loadaddr $uboot; then " \ 123 "sf probe; " \ 124 "sf erase 0 0xC0000; " \ 125 "sf write $loadaddr 0x400 $filesize; " \ 126 "echo 'U-Boot upgraded. Please reset'; " \ 127 "fi\0" \ 128 "setargs=setenv bootargs console=${console},${baudrate} " \ 129 "root=/dev/${rootdev} rw rootwait " CONFIG_EXTRA_BOOTARGS "\0" \ 130 "loadbootscript=" \ 131 "${loadcmd} ${dev} ${devnum}:${partnum} ${loadaddr} ${script};\0" \ 132 "bootscript=echo Running bootscript from ${dev}:${devnum}:${partnum};" \ 133 " source\0" \ 134 "loadimage=" \ 135 "${loadcmd} ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \ 136 "loadfdt=${loadcmd} ${dev} ${devnum}:${partnum} ${fdt_addr} ${fdt_file}\0" \ 137 "tryboot=" \ 138 "if run loadbootscript; then " \ 139 "run bootscript; " \ 140 "else " \ 141 "if run loadimage; then " \ 142 "run doboot; " \ 143 "fi; " \ 144 "fi;\0" \ 145 "doboot=echo Booting from ${dev}:${devnum}:${partnum} ...; " \ 146 "run setargs; " \ 147 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 148 "if run loadfdt; then " \ 149 "bootm ${loadaddr} - ${fdt_addr}; " \ 150 "else " \ 151 "if test ${boot_fdt} = try; then " \ 152 "bootm; " \ 153 "else " \ 154 "echo WARN: Cannot load the DT; " \ 155 "fi; " \ 156 "fi; " \ 157 "else " \ 158 "bootm; " \ 159 "fi;\0" \ 160 "netargs=setenv bootargs console=${console},${baudrate} " \ 161 "root=/dev/nfs " \ 162 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 163 "netboot=echo Booting from net ...; " \ 164 "run netargs; " \ 165 "if test ${ip_dyn} = yes; then " \ 166 "setenv get_cmd dhcp; " \ 167 "else " \ 168 "setenv get_cmd tftp; " \ 169 "fi; " \ 170 "${get_cmd} ${image}; " \ 171 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 172 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 173 "bootm ${loadaddr} - ${fdt_addr}; " \ 174 "else " \ 175 "if test ${boot_fdt} = try; then " \ 176 "bootm; " \ 177 "else " \ 178 "echo WARN: Cannot load the DT; " \ 179 "fi; " \ 180 "fi; " \ 181 "else " \ 182 "bootm; " \ 183 "fi;\0" \ 184 185 #define CONFIG_BOOTCOMMAND \ 186 "usb start; " \ 187 "setenv dev usb; " \ 188 "setenv devnum 0; " \ 189 "setenv rootdev sda${rfspart}; " \ 190 "run tryboot; " \ 191 \ 192 "setenv dev mmc; " \ 193 "setenv rootdev mmcblk0p${rfspart}; " \ 194 \ 195 "setenv devnum ${sddev}; " \ 196 "if mmc dev ${devnum}; then " \ 197 "run tryboot; " \ 198 "fi; " \ 199 \ 200 "setenv devnum ${emmcdev}; " \ 201 "setenv rootdev mmcblk${emmcdev}p${rfspart}; " \ 202 "if mmc dev ${devnum}; then " \ 203 "run tryboot; " \ 204 "fi; " \ 205 \ 206 "bmode usb; " \ 207 208 #define CONFIG_ARP_TIMEOUT 200UL 209 210 /* Miscellaneous configurable options */ 211 #define CONFIG_SYS_LONGHELP 212 #define CONFIG_AUTO_COMPLETE 213 214 /* Print Buffer Size */ 215 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 216 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 217 218 #define CONFIG_SYS_MEMTEST_START 0x10000000 219 #define CONFIG_SYS_MEMTEST_END 0x10010000 220 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 221 222 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 223 224 #define CONFIG_CMDLINE_EDITING 225 226 /* Physical Memory Map */ 227 #define CONFIG_NR_DRAM_BANKS 1 228 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 229 230 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 231 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 232 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 233 234 #define CONFIG_SYS_INIT_SP_OFFSET \ 235 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 236 #define CONFIG_SYS_INIT_SP_ADDR \ 237 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 238 239 /* FLASH and environment organization */ 240 241 #define CONFIG_ENV_SIZE (8 * 1024) 242 #define CONFIG_ENV_OFFSET (768 * 1024) 243 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 244 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 245 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 246 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 247 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 248 249 #ifndef CONFIG_SYS_DCACHE_OFF 250 #endif 251 252 #define CONFIG_SYS_FSL_USDHC_NUM 3 253 254 /* Framebuffer */ 255 #ifdef CONFIG_VIDEO 256 #define CONFIG_VIDEO_IPUV3 257 #define CONFIG_VIDEO_BMP_RLE8 258 #define CONFIG_SPLASH_SCREEN 259 #define CONFIG_SPLASH_SCREEN_ALIGN 260 #define CONFIG_BMP_16BPP 261 #define CONFIG_VIDEO_LOGO 262 #define CONFIG_VIDEO_BMP_LOGO 263 #define CONFIG_IPUV3_CLK 260000000 264 #define CONFIG_IMX_HDMI 265 #define CONFIG_IMX_VIDEO_SKIP 266 #endif 267 268 #define CONFIG_PWM_IMX 269 #define CONFIG_IMX6_PWM_PER_CLK 66000000 270 271 #ifdef CONFIG_CMD_PCI 272 #define CONFIG_PCI_SCAN_SHOW 273 #define CONFIG_PCIE_IMX 274 #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) 275 #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(1, 5) 276 #endif 277 278 /* I2C Configs */ 279 #define CONFIG_SYS_I2C 280 #define CONFIG_SYS_I2C_MXC 281 #define CONFIG_SYS_I2C_SPEED 100000 282 #define CONFIG_SYS_I2C_MXC_I2C1 283 #define CONFIG_SYS_I2C_MXC_I2C2 284 #define CONFIG_SYS_I2C_MXC_I2C3 285 286 #endif /* __ADVANTECH_DMSBA16_CONFIG_H */ 287