1 /* 2 * Copyright (C) 2016 Timesys Corporation 3 * Copyright (C) 2016 Advantech Corporation 4 * Copyright (C) 2012 Freescale Semiconductor, Inc. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __ADVANTECH_DMSBA16_CONFIG_H 10 #define __ADVANTECH_DMSBA16_CONFIG_H 11 12 #include <asm/arch/imx-regs.h> 13 #include <asm/imx-common/gpio.h> 14 15 #define CONFIG_BOARD_NAME "Advantech DMS-BA16" 16 17 #define CONFIG_MXC_UART_BASE UART4_BASE 18 #define CONSOLE_DEV "ttymxc3" 19 #define CONFIG_EXTRA_BOOTARGS "panic=10" 20 21 #define CONFIG_BOOT_DIR "" 22 #define CONFIG_LOADCMD "fatload" 23 #define CONFIG_RFSPART "2" 24 25 #define CONFIG_SUPPORT_EMMC_BOOT 26 27 #include "mx6_common.h" 28 #include <linux/sizes.h> 29 30 #define CONFIG_CMDLINE_TAG 31 #define CONFIG_SETUP_MEMORY_TAGS 32 #define CONFIG_INITRD_TAG 33 #define CONFIG_REVISION_TAG 34 #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) 35 36 #define CONFIG_MXC_GPIO 37 #define CONFIG_MXC_UART 38 39 #define CONFIG_MXC_OCOTP 40 41 /* SATA Configs */ 42 #define CONFIG_CMD_SATA 43 #define CONFIG_DWC_AHSATA 44 #define CONFIG_SYS_SATA_MAX_DEVICE 1 45 #define CONFIG_DWC_AHSATA_PORT_ID 0 46 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 47 #define CONFIG_LBA48 48 #define CONFIG_LIBATA 49 50 /* MMC Configs */ 51 #define CONFIG_FSL_ESDHC 52 #define CONFIG_FSL_USDHC 53 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 54 #define CONFIG_BOUNCE_BUFFER 55 56 /* USB Configs */ 57 #define CONFIG_USB_STORAGE 58 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 59 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 60 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 61 #define CONFIG_MXC_USB_FLAGS 0 62 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP 63 64 #define CONFIG_USBD_HS 65 #define CONFIG_USB_FUNCTION_MASS_STORAGE 66 #define CONFIG_USB_GADGET_VBUS_DRAW 2 67 68 /* Networking Configs */ 69 #define CONFIG_FEC_MXC 70 #define CONFIG_MII 71 #define IMX_FEC_BASE ENET_BASE_ADDR 72 #define CONFIG_FEC_XCV_TYPE RGMII 73 #define CONFIG_ETHPRIME "FEC" 74 #define CONFIG_FEC_MXC_PHYADDR 4 75 #define CONFIG_PHYLIB 76 #define CONFIG_PHY_ATHEROS 77 78 /* Serial Flash */ 79 #ifdef CONFIG_CMD_SF 80 #define CONFIG_MXC_SPI 81 #define CONFIG_SF_DEFAULT_BUS 0 82 #define CONFIG_SF_DEFAULT_CS 0 83 #define CONFIG_SF_DEFAULT_SPEED 20000000 84 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 85 #endif 86 87 /* allow to overwrite serial and ethaddr */ 88 #define CONFIG_ENV_OVERWRITE 89 #define CONFIG_CONS_INDEX 1 90 91 #define CONFIG_LOADADDR 0x12000000 92 #define CONFIG_SYS_TEXT_BASE 0x17800000 93 94 #define CONFIG_EXTRA_ENV_SETTINGS \ 95 "script=boot.scr\0" \ 96 "image=" CONFIG_BOOT_DIR "/uImage\0" \ 97 "uboot=u-boot.imx\0" \ 98 "fdt_file=" CONFIG_BOOT_DIR "/" CONFIG_DEFAULT_FDT_FILE "\0" \ 99 "fdt_addr=0x18000000\0" \ 100 "boot_fdt=yes\0" \ 101 "ip_dyn=yes\0" \ 102 "console=" CONSOLE_DEV "\0" \ 103 "fdt_high=0xffffffff\0" \ 104 "initrd_high=0xffffffff\0" \ 105 "sddev=0\0" \ 106 "emmcdev=1\0" \ 107 "partnum=1\0" \ 108 "loadcmd=" CONFIG_LOADCMD "\0" \ 109 "rfspart=" CONFIG_RFSPART "\0" \ 110 "update_sd_firmware=" \ 111 "if test ${ip_dyn} = yes; then " \ 112 "setenv get_cmd dhcp; " \ 113 "else " \ 114 "setenv get_cmd tftp; " \ 115 "fi; " \ 116 "if mmc dev ${mmcdev}; then " \ 117 "if ${get_cmd} ${update_sd_firmware_filename}; then " \ 118 "setexpr fw_sz ${filesize} / 0x200; " \ 119 "setexpr fw_sz ${fw_sz} + 1; " \ 120 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ 121 "fi; " \ 122 "fi\0" \ 123 "update_sf_uboot=" \ 124 "if tftp $loadaddr $uboot; then " \ 125 "sf probe; " \ 126 "sf erase 0 0xC0000; " \ 127 "sf write $loadaddr 0x400 $filesize; " \ 128 "echo 'U-Boot upgraded. Please reset'; " \ 129 "fi\0" \ 130 "setargs=setenv bootargs console=${console},${baudrate} " \ 131 "root=/dev/${rootdev} rw rootwait " CONFIG_EXTRA_BOOTARGS "\0" \ 132 "loadbootscript=" \ 133 "${loadcmd} ${dev} ${devnum}:${partnum} ${loadaddr} ${script};\0" \ 134 "bootscript=echo Running bootscript from ${dev}:${devnum}:${partnum};" \ 135 " source\0" \ 136 "loadimage=" \ 137 "${loadcmd} ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \ 138 "loadfdt=${loadcmd} ${dev} ${devnum}:${partnum} ${fdt_addr} ${fdt_file}\0" \ 139 "tryboot=" \ 140 "if run loadbootscript; then " \ 141 "run bootscript; " \ 142 "else " \ 143 "if run loadimage; then " \ 144 "run doboot; " \ 145 "fi; " \ 146 "fi;\0" \ 147 "doboot=echo Booting from ${dev}:${devnum}:${partnum} ...; " \ 148 "run setargs; " \ 149 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 150 "if run loadfdt; then " \ 151 "bootm ${loadaddr} - ${fdt_addr}; " \ 152 "else " \ 153 "if test ${boot_fdt} = try; then " \ 154 "bootm; " \ 155 "else " \ 156 "echo WARN: Cannot load the DT; " \ 157 "fi; " \ 158 "fi; " \ 159 "else " \ 160 "bootm; " \ 161 "fi;\0" \ 162 "netargs=setenv bootargs console=${console},${baudrate} " \ 163 "root=/dev/nfs " \ 164 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 165 "netboot=echo Booting from net ...; " \ 166 "run netargs; " \ 167 "if test ${ip_dyn} = yes; then " \ 168 "setenv get_cmd dhcp; " \ 169 "else " \ 170 "setenv get_cmd tftp; " \ 171 "fi; " \ 172 "${get_cmd} ${image}; " \ 173 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 174 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 175 "bootm ${loadaddr} - ${fdt_addr}; " \ 176 "else " \ 177 "if test ${boot_fdt} = try; then " \ 178 "bootm; " \ 179 "else " \ 180 "echo WARN: Cannot load the DT; " \ 181 "fi; " \ 182 "fi; " \ 183 "else " \ 184 "bootm; " \ 185 "fi;\0" \ 186 187 #define CONFIG_BOOTCOMMAND \ 188 "usb start; " \ 189 "setenv dev usb; " \ 190 "setenv devnum 0; " \ 191 "setenv rootdev sda${rfspart}; " \ 192 "run tryboot; " \ 193 \ 194 "setenv dev mmc; " \ 195 "setenv rootdev mmcblk0p${rfspart}; " \ 196 \ 197 "setenv devnum ${sddev}; " \ 198 "if mmc dev ${devnum}; then " \ 199 "run tryboot; " \ 200 "fi; " \ 201 \ 202 "setenv devnum ${emmcdev}; " \ 203 "setenv rootdev mmcblk${emmcdev}p${rfspart}; " \ 204 "if mmc dev ${devnum}; then " \ 205 "run tryboot; " \ 206 "fi; " \ 207 \ 208 "bmode usb; " \ 209 210 #define CONFIG_ARP_TIMEOUT 200UL 211 212 /* Miscellaneous configurable options */ 213 #define CONFIG_SYS_LONGHELP 214 #define CONFIG_AUTO_COMPLETE 215 216 /* Print Buffer Size */ 217 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 218 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 219 220 #define CONFIG_SYS_MEMTEST_START 0x10000000 221 #define CONFIG_SYS_MEMTEST_END 0x10010000 222 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 223 224 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 225 226 #define CONFIG_CMDLINE_EDITING 227 228 /* Physical Memory Map */ 229 #define CONFIG_NR_DRAM_BANKS 1 230 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 231 232 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 233 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 234 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 235 236 #define CONFIG_SYS_INIT_SP_OFFSET \ 237 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 238 #define CONFIG_SYS_INIT_SP_ADDR \ 239 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 240 241 /* FLASH and environment organization */ 242 243 #define CONFIG_ENV_IS_IN_SPI_FLASH 244 #define CONFIG_ENV_SIZE (8 * 1024) 245 #define CONFIG_ENV_OFFSET (768 * 1024) 246 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 247 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 248 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 249 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 250 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 251 252 #ifndef CONFIG_SYS_DCACHE_OFF 253 #endif 254 255 #define CONFIG_SYS_FSL_USDHC_NUM 3 256 257 /* Framebuffer */ 258 #ifdef CONFIG_VIDEO 259 #define CONFIG_VIDEO_IPUV3 260 #define CONFIG_VIDEO_BMP_RLE8 261 #define CONFIG_SPLASH_SCREEN 262 #define CONFIG_SPLASH_SCREEN_ALIGN 263 #define CONFIG_BMP_16BPP 264 #define CONFIG_VIDEO_LOGO 265 #define CONFIG_VIDEO_BMP_LOGO 266 #define CONFIG_IPUV3_CLK 260000000 267 #define CONFIG_IMX_HDMI 268 #define CONFIG_IMX_VIDEO_SKIP 269 #endif 270 271 #define CONFIG_PWM_IMX 272 #define CONFIG_IMX6_PWM_PER_CLK 66000000 273 274 #undef CONFIG_CMD_PCI 275 #ifdef CONFIG_CMD_PCI 276 #define CONFIG_PCI_SCAN_SHOW 277 #define CONFIG_PCIE_IMX 278 #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) 279 #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(1, 5) 280 #endif 281 282 /* I2C Configs */ 283 #define CONFIG_SYS_I2C 284 #define CONFIG_SYS_I2C_MXC 285 #define CONFIG_SYS_I2C_SPEED 100000 286 #define CONFIG_SYS_I2C_MXC_I2C1 287 #define CONFIG_SYS_I2C_MXC_I2C2 288 #define CONFIG_SYS_I2C_MXC_I2C3 289 290 #endif /* __ADVANTECH_DMSBA16_CONFIG_H */ 291