1 /* 2 * Copyright (C) 2016 Timesys Corporation 3 * Copyright (C) 2016 Advantech Corporation 4 * Copyright (C) 2012 Freescale Semiconductor, Inc. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __ADVANTECH_DMSBA16_CONFIG_H 10 #define __ADVANTECH_DMSBA16_CONFIG_H 11 12 #include <asm/arch/imx-regs.h> 13 #include <asm/mach-imx/gpio.h> 14 15 #define CONFIG_BOARD_NAME "Advantech DMS-BA16" 16 17 #define CONFIG_MXC_UART_BASE UART4_BASE 18 #define CONSOLE_DEV "ttymxc3" 19 #define CONFIG_EXTRA_BOOTARGS "panic=10" 20 21 #define CONFIG_BOOT_DIR "" 22 #define CONFIG_LOADCMD "fatload" 23 #define CONFIG_RFSPART "2" 24 25 #define CONFIG_SUPPORT_EMMC_BOOT 26 27 #include "mx6_common.h" 28 #include <linux/sizes.h> 29 30 #define CONFIG_CMDLINE_TAG 31 #define CONFIG_SETUP_MEMORY_TAGS 32 #define CONFIG_INITRD_TAG 33 #define CONFIG_REVISION_TAG 34 #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) 35 36 #define CONFIG_MXC_GPIO 37 #define CONFIG_MXC_UART 38 39 #define CONFIG_MXC_OCOTP 40 41 /* SATA Configs */ 42 #define CONFIG_DWC_AHSATA 43 #define CONFIG_SYS_SATA_MAX_DEVICE 1 44 #define CONFIG_DWC_AHSATA_PORT_ID 0 45 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 46 #define CONFIG_LBA48 47 #define CONFIG_LIBATA 48 49 /* MMC Configs */ 50 #define CONFIG_FSL_ESDHC 51 #define CONFIG_FSL_USDHC 52 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 53 #define CONFIG_BOUNCE_BUFFER 54 55 /* USB Configs */ 56 #define CONFIG_USB_STORAGE 57 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 58 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 59 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 60 #define CONFIG_MXC_USB_FLAGS 0 61 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP 62 63 #define CONFIG_USBD_HS 64 #define CONFIG_USB_FUNCTION_MASS_STORAGE 65 #define CONFIG_USB_GADGET_VBUS_DRAW 2 66 67 /* Networking Configs */ 68 #define CONFIG_FEC_MXC 69 #define CONFIG_MII 70 #define IMX_FEC_BASE ENET_BASE_ADDR 71 #define CONFIG_FEC_XCV_TYPE RGMII 72 #define CONFIG_ETHPRIME "FEC" 73 #define CONFIG_FEC_MXC_PHYADDR 4 74 #define CONFIG_PHYLIB 75 #define CONFIG_PHY_ATHEROS 76 77 /* Serial Flash */ 78 #ifdef CONFIG_CMD_SF 79 #define CONFIG_MXC_SPI 80 #define CONFIG_SF_DEFAULT_BUS 0 81 #define CONFIG_SF_DEFAULT_CS 0 82 #define CONFIG_SF_DEFAULT_SPEED 20000000 83 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 84 #endif 85 86 /* allow to overwrite serial and ethaddr */ 87 #define CONFIG_ENV_OVERWRITE 88 #define CONFIG_CONS_INDEX 1 89 90 #define CONFIG_LOADADDR 0x12000000 91 #define CONFIG_SYS_TEXT_BASE 0x17800000 92 93 #define CONFIG_EXTRA_ENV_SETTINGS \ 94 "script=boot.scr\0" \ 95 "image=" CONFIG_BOOT_DIR "/uImage\0" \ 96 "uboot=u-boot.imx\0" \ 97 "fdt_file=" CONFIG_BOOT_DIR "/" CONFIG_DEFAULT_FDT_FILE "\0" \ 98 "fdt_addr=0x18000000\0" \ 99 "boot_fdt=yes\0" \ 100 "ip_dyn=yes\0" \ 101 "console=" CONSOLE_DEV "\0" \ 102 "fdt_high=0xffffffff\0" \ 103 "initrd_high=0xffffffff\0" \ 104 "sddev=0\0" \ 105 "emmcdev=1\0" \ 106 "partnum=1\0" \ 107 "loadcmd=" CONFIG_LOADCMD "\0" \ 108 "rfspart=" CONFIG_RFSPART "\0" \ 109 "update_sd_firmware=" \ 110 "if test ${ip_dyn} = yes; then " \ 111 "setenv get_cmd dhcp; " \ 112 "else " \ 113 "setenv get_cmd tftp; " \ 114 "fi; " \ 115 "if mmc dev ${mmcdev}; then " \ 116 "if ${get_cmd} ${update_sd_firmware_filename}; then " \ 117 "setexpr fw_sz ${filesize} / 0x200; " \ 118 "setexpr fw_sz ${fw_sz} + 1; " \ 119 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ 120 "fi; " \ 121 "fi\0" \ 122 "update_sf_uboot=" \ 123 "if tftp $loadaddr $uboot; then " \ 124 "sf probe; " \ 125 "sf erase 0 0xC0000; " \ 126 "sf write $loadaddr 0x400 $filesize; " \ 127 "echo 'U-Boot upgraded. Please reset'; " \ 128 "fi\0" \ 129 "setargs=setenv bootargs console=${console},${baudrate} " \ 130 "root=/dev/${rootdev} rw rootwait " CONFIG_EXTRA_BOOTARGS "\0" \ 131 "loadbootscript=" \ 132 "${loadcmd} ${dev} ${devnum}:${partnum} ${loadaddr} ${script};\0" \ 133 "bootscript=echo Running bootscript from ${dev}:${devnum}:${partnum};" \ 134 " source\0" \ 135 "loadimage=" \ 136 "${loadcmd} ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \ 137 "loadfdt=${loadcmd} ${dev} ${devnum}:${partnum} ${fdt_addr} ${fdt_file}\0" \ 138 "tryboot=" \ 139 "if run loadbootscript; then " \ 140 "run bootscript; " \ 141 "else " \ 142 "if run loadimage; then " \ 143 "run doboot; " \ 144 "fi; " \ 145 "fi;\0" \ 146 "doboot=echo Booting from ${dev}:${devnum}:${partnum} ...; " \ 147 "run setargs; " \ 148 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 149 "if run loadfdt; then " \ 150 "bootm ${loadaddr} - ${fdt_addr}; " \ 151 "else " \ 152 "if test ${boot_fdt} = try; then " \ 153 "bootm; " \ 154 "else " \ 155 "echo WARN: Cannot load the DT; " \ 156 "fi; " \ 157 "fi; " \ 158 "else " \ 159 "bootm; " \ 160 "fi;\0" \ 161 "netargs=setenv bootargs console=${console},${baudrate} " \ 162 "root=/dev/nfs " \ 163 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 164 "netboot=echo Booting from net ...; " \ 165 "run netargs; " \ 166 "if test ${ip_dyn} = yes; then " \ 167 "setenv get_cmd dhcp; " \ 168 "else " \ 169 "setenv get_cmd tftp; " \ 170 "fi; " \ 171 "${get_cmd} ${image}; " \ 172 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 173 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 174 "bootm ${loadaddr} - ${fdt_addr}; " \ 175 "else " \ 176 "if test ${boot_fdt} = try; then " \ 177 "bootm; " \ 178 "else " \ 179 "echo WARN: Cannot load the DT; " \ 180 "fi; " \ 181 "fi; " \ 182 "else " \ 183 "bootm; " \ 184 "fi;\0" \ 185 186 #define CONFIG_BOOTCOMMAND \ 187 "usb start; " \ 188 "setenv dev usb; " \ 189 "setenv devnum 0; " \ 190 "setenv rootdev sda${rfspart}; " \ 191 "run tryboot; " \ 192 \ 193 "setenv dev mmc; " \ 194 "setenv rootdev mmcblk0p${rfspart}; " \ 195 \ 196 "setenv devnum ${sddev}; " \ 197 "if mmc dev ${devnum}; then " \ 198 "run tryboot; " \ 199 "fi; " \ 200 \ 201 "setenv devnum ${emmcdev}; " \ 202 "setenv rootdev mmcblk${emmcdev}p${rfspart}; " \ 203 "if mmc dev ${devnum}; then " \ 204 "run tryboot; " \ 205 "fi; " \ 206 \ 207 "bmode usb; " \ 208 209 #define CONFIG_ARP_TIMEOUT 200UL 210 211 /* Miscellaneous configurable options */ 212 #define CONFIG_SYS_LONGHELP 213 #define CONFIG_AUTO_COMPLETE 214 215 /* Print Buffer Size */ 216 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 217 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 218 219 #define CONFIG_SYS_MEMTEST_START 0x10000000 220 #define CONFIG_SYS_MEMTEST_END 0x10010000 221 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 222 223 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 224 225 #define CONFIG_CMDLINE_EDITING 226 227 /* Physical Memory Map */ 228 #define CONFIG_NR_DRAM_BANKS 1 229 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 230 231 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 232 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 233 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 234 235 #define CONFIG_SYS_INIT_SP_OFFSET \ 236 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 237 #define CONFIG_SYS_INIT_SP_ADDR \ 238 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 239 240 /* FLASH and environment organization */ 241 242 #define CONFIG_ENV_SIZE (8 * 1024) 243 #define CONFIG_ENV_OFFSET (768 * 1024) 244 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 245 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 246 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 247 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 248 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 249 250 #ifndef CONFIG_SYS_DCACHE_OFF 251 #endif 252 253 #define CONFIG_SYS_FSL_USDHC_NUM 3 254 255 /* Framebuffer */ 256 #ifdef CONFIG_VIDEO 257 #define CONFIG_VIDEO_IPUV3 258 #define CONFIG_VIDEO_BMP_RLE8 259 #define CONFIG_SPLASH_SCREEN 260 #define CONFIG_SPLASH_SCREEN_ALIGN 261 #define CONFIG_BMP_16BPP 262 #define CONFIG_VIDEO_LOGO 263 #define CONFIG_VIDEO_BMP_LOGO 264 #define CONFIG_IPUV3_CLK 260000000 265 #define CONFIG_IMX_HDMI 266 #define CONFIG_IMX_VIDEO_SKIP 267 #endif 268 269 #define CONFIG_PWM_IMX 270 #define CONFIG_IMX6_PWM_PER_CLK 66000000 271 272 #undef CONFIG_CMD_PCI 273 #ifdef CONFIG_CMD_PCI 274 #define CONFIG_PCI_SCAN_SHOW 275 #define CONFIG_PCIE_IMX 276 #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) 277 #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(1, 5) 278 #endif 279 280 /* I2C Configs */ 281 #define CONFIG_SYS_I2C 282 #define CONFIG_SYS_I2C_MXC 283 #define CONFIG_SYS_I2C_SPEED 100000 284 #define CONFIG_SYS_I2C_MXC_I2C1 285 #define CONFIG_SYS_I2C_MXC_I2C2 286 #define CONFIG_SYS_I2C_MXC_I2C3 287 288 #endif /* __ADVANTECH_DMSBA16_CONFIG_H */ 289