1 /*
2  * Copyright (C) 2016 Timesys Corporation
3  * Copyright (C) 2016 Advantech Corporation
4  * Copyright (C) 2012 Freescale Semiconductor, Inc.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __ADVANTECH_DMSBA16_CONFIG_H
10 #define __ADVANTECH_DMSBA16_CONFIG_H
11 
12 #include <asm/arch/imx-regs.h>
13 #include <asm/mach-imx/gpio.h>
14 
15 #define CONFIG_BOARD_NAME	"Advantech DMS-BA16"
16 
17 #define CONFIG_MXC_UART_BASE	UART4_BASE
18 #define CONSOLE_DEV	"ttymxc3"
19 #define CONFIG_EXTRA_BOOTARGS	"panic=10"
20 
21 #define CONFIG_BOOT_DIR	""
22 #define CONFIG_LOADCMD "fatload"
23 #define CONFIG_RFSPART "2"
24 
25 #define CONFIG_SUPPORT_EMMC_BOOT
26 
27 #include "mx6_common.h"
28 #include <linux/sizes.h>
29 
30 #define CONFIG_CMDLINE_TAG
31 #define CONFIG_SETUP_MEMORY_TAGS
32 #define CONFIG_INITRD_TAG
33 #define CONFIG_REVISION_TAG
34 #define CONFIG_SYS_MALLOC_LEN		(10 * SZ_1M)
35 
36 #define CONFIG_MXC_GPIO
37 #define CONFIG_MXC_UART
38 
39 #define CONFIG_MXC_OCOTP
40 
41 /* SATA Configs */
42 #define CONFIG_SYS_SATA_MAX_DEVICE	1
43 #define CONFIG_DWC_AHSATA_PORT_ID	0
44 #define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
45 #define CONFIG_LBA48
46 
47 /* MMC Configs */
48 #define CONFIG_FSL_ESDHC
49 #define CONFIG_FSL_USDHC
50 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
51 #define CONFIG_BOUNCE_BUFFER
52 
53 /* USB Configs */
54 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
55 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
56 #define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
57 #define CONFIG_MXC_USB_FLAGS	0
58 
59 #define CONFIG_USBD_HS
60 
61 /* Networking Configs */
62 #define CONFIG_FEC_MXC
63 #define CONFIG_MII
64 #define IMX_FEC_BASE			ENET_BASE_ADDR
65 #define CONFIG_FEC_XCV_TYPE		RGMII
66 #define CONFIG_ETHPRIME		"FEC"
67 #define CONFIG_FEC_MXC_PHYADDR		4
68 #define CONFIG_PHY_ATHEROS
69 
70 /* Serial Flash */
71 #ifdef CONFIG_CMD_SF
72 #define CONFIG_MXC_SPI
73 #define CONFIG_SF_DEFAULT_BUS		0
74 #define CONFIG_SF_DEFAULT_CS		0
75 #define CONFIG_SF_DEFAULT_SPEED	20000000
76 #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
77 #endif
78 
79 /* allow to overwrite serial and ethaddr */
80 #define CONFIG_ENV_OVERWRITE
81 #define CONFIG_CONS_INDEX	1
82 
83 #define CONFIG_LOADADDR	0x12000000
84 #define CONFIG_SYS_TEXT_BASE	0x17800000
85 
86 #define CONFIG_EXTRA_ENV_SETTINGS \
87 	"script=boot.scr\0" \
88 	"image=" CONFIG_BOOT_DIR "/uImage\0" \
89 	"uboot=u-boot.imx\0" \
90 	"fdt_file=" CONFIG_BOOT_DIR "/" CONFIG_DEFAULT_FDT_FILE "\0" \
91 	"fdt_addr=0x18000000\0" \
92 	"boot_fdt=yes\0" \
93 	"ip_dyn=yes\0" \
94 	"console=" CONSOLE_DEV "\0" \
95 	"fdt_high=0xffffffff\0"	  \
96 	"initrd_high=0xffffffff\0" \
97 	"sddev=0\0" \
98 	"emmcdev=1\0" \
99 	"partnum=1\0" \
100 	"loadcmd=" CONFIG_LOADCMD "\0" \
101 	"rfspart=" CONFIG_RFSPART "\0" \
102 	"update_sd_firmware=" \
103 		"if test ${ip_dyn} = yes; then " \
104 			"setenv get_cmd dhcp; " \
105 		"else " \
106 			"setenv get_cmd tftp; " \
107 		"fi; " \
108 		"if mmc dev ${mmcdev}; then "	\
109 			"if ${get_cmd} ${update_sd_firmware_filename}; then " \
110 				"setexpr fw_sz ${filesize} / 0x200; " \
111 				"setexpr fw_sz ${fw_sz} + 1; "	\
112 				"mmc write ${loadaddr} 0x2 ${fw_sz}; " \
113 			"fi; "	\
114 		"fi\0" \
115 	"update_sf_uboot=" \
116 		"if tftp $loadaddr $uboot; then " \
117 			"sf probe; " \
118 			"sf erase 0 0xC0000; " \
119 			"sf write $loadaddr 0x400 $filesize; " \
120 			"echo 'U-Boot upgraded. Please reset'; " \
121 		"fi\0" \
122 	"setargs=setenv bootargs console=${console},${baudrate} " \
123 		"root=/dev/${rootdev} rw rootwait " CONFIG_EXTRA_BOOTARGS "\0" \
124 	"loadbootscript=" \
125 		"${loadcmd} ${dev} ${devnum}:${partnum} ${loadaddr} ${script};\0" \
126 	"bootscript=echo Running bootscript from ${dev}:${devnum}:${partnum};" \
127 		" source\0" \
128 	"loadimage=" \
129 		"${loadcmd} ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \
130 	"loadfdt=${loadcmd} ${dev} ${devnum}:${partnum} ${fdt_addr} ${fdt_file}\0" \
131 	"tryboot=" \
132 		"if run loadbootscript; then " \
133 			"run bootscript; " \
134 		"else " \
135 			"if run loadimage; then " \
136 				"run doboot; " \
137 			"fi; " \
138 		"fi;\0" \
139 	"doboot=echo Booting from ${dev}:${devnum}:${partnum} ...; " \
140 		"run setargs; " \
141 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
142 			"if run loadfdt; then " \
143 				"bootm ${loadaddr} - ${fdt_addr}; " \
144 			"else " \
145 				"if test ${boot_fdt} = try; then " \
146 					"bootm; " \
147 				"else " \
148 					"echo WARN: Cannot load the DT; " \
149 				"fi; " \
150 			"fi; " \
151 		"else " \
152 			"bootm; " \
153 		"fi;\0" \
154 	"netargs=setenv bootargs console=${console},${baudrate} " \
155 		"root=/dev/nfs " \
156 		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
157 	"netboot=echo Booting from net ...; " \
158 		"run netargs; " \
159 		"if test ${ip_dyn} = yes; then " \
160 			"setenv get_cmd dhcp; " \
161 		"else " \
162 			"setenv get_cmd tftp; " \
163 		"fi; " \
164 		"${get_cmd} ${image}; " \
165 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
166 			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
167 				"bootm ${loadaddr} - ${fdt_addr}; " \
168 			"else " \
169 				"if test ${boot_fdt} = try; then " \
170 					"bootm; " \
171 				"else " \
172 					"echo WARN: Cannot load the DT; " \
173 				"fi; " \
174 			"fi; " \
175 		"else " \
176 			"bootm; " \
177 		"fi;\0" \
178 
179 #define CONFIG_BOOTCOMMAND \
180 	"usb start; " \
181 	"setenv dev usb; " \
182 	"setenv devnum 0; " \
183 	"setenv rootdev sda${rfspart}; " \
184 	"run tryboot; " \
185 	\
186 	"setenv dev mmc; " \
187 	"setenv rootdev mmcblk0p${rfspart}; " \
188 	\
189 	"setenv devnum ${sddev}; " \
190 	"if mmc dev ${devnum}; then " \
191 		"run tryboot; " \
192 	"fi; " \
193 	\
194 	"setenv devnum ${emmcdev}; " \
195 	"setenv rootdev mmcblk${emmcdev}p${rfspart}; " \
196 	"if mmc dev ${devnum}; then " \
197 		"run tryboot; " \
198 	"fi; " \
199 	\
200 	"bmode usb; " \
201 
202 #define CONFIG_ARP_TIMEOUT     200UL
203 
204 /* Miscellaneous configurable options */
205 #define CONFIG_SYS_LONGHELP
206 #define CONFIG_AUTO_COMPLETE
207 
208 #define CONFIG_SYS_MEMTEST_START       0x10000000
209 #define CONFIG_SYS_MEMTEST_END         0x10010000
210 #define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000
211 
212 #define CONFIG_SYS_LOAD_ADDR           CONFIG_LOADADDR
213 
214 #define CONFIG_CMDLINE_EDITING
215 
216 /* Physical Memory Map */
217 #define CONFIG_NR_DRAM_BANKS           1
218 #define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR
219 
220 #define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM
221 #define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
222 #define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
223 
224 #define CONFIG_SYS_INIT_SP_OFFSET \
225 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
226 #define CONFIG_SYS_INIT_SP_ADDR \
227 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
228 
229 /* FLASH and environment organization */
230 
231 #define CONFIG_ENV_SIZE                 (8 * 1024)
232 #define CONFIG_ENV_OFFSET               (768 * 1024)
233 #define CONFIG_ENV_SECT_SIZE            (64 * 1024)
234 #define CONFIG_ENV_SPI_BUS              CONFIG_SF_DEFAULT_BUS
235 #define CONFIG_ENV_SPI_CS               CONFIG_SF_DEFAULT_CS
236 #define CONFIG_ENV_SPI_MODE             CONFIG_SF_DEFAULT_MODE
237 #define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
238 
239 #ifndef CONFIG_SYS_DCACHE_OFF
240 #endif
241 
242 #define CONFIG_SYS_FSL_USDHC_NUM        3
243 
244 /* Framebuffer */
245 #ifdef CONFIG_VIDEO
246 #define CONFIG_VIDEO_IPUV3
247 #define CONFIG_VIDEO_BMP_RLE8
248 #define CONFIG_SPLASH_SCREEN
249 #define CONFIG_SPLASH_SCREEN_ALIGN
250 #define CONFIG_BMP_16BPP
251 #define CONFIG_VIDEO_LOGO
252 #define CONFIG_VIDEO_BMP_LOGO
253 #define CONFIG_IMX_HDMI
254 #define CONFIG_IMX_VIDEO_SKIP
255 #endif
256 
257 #define CONFIG_PWM_IMX
258 #define CONFIG_IMX6_PWM_PER_CLK         66000000
259 
260 #ifdef CONFIG_CMD_PCI
261 #define CONFIG_PCI_SCAN_SHOW
262 #define CONFIG_PCIE_IMX
263 #define CONFIG_PCIE_IMX_PERST_GPIO      IMX_GPIO_NR(7, 12)
264 #define CONFIG_PCIE_IMX_POWER_GPIO      IMX_GPIO_NR(1, 5)
265 #endif
266 
267 /* I2C Configs */
268 #define CONFIG_SYS_I2C
269 #define CONFIG_SYS_I2C_MXC
270 #define CONFIG_SYS_I2C_SPEED            100000
271 #define CONFIG_SYS_I2C_MXC_I2C1
272 #define CONFIG_SYS_I2C_MXC_I2C2
273 #define CONFIG_SYS_I2C_MXC_I2C3
274 
275 #endif	/* __ADVANTECH_DMSBA16_CONFIG_H */
276