1 /* 2 * Configuation settings for the Renesas Solutions Migo-R board 3 * 4 * Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __MIGO_R_H 10 #define __MIGO_R_H 11 12 #undef DEBUG 13 #define CONFIG_CPU_SH7722 1 14 #define CONFIG_MIGO_R 1 15 16 #define CONFIG_CMD_PING 17 #define CONFIG_CMD_SDRAM 18 19 #define CONFIG_BAUDRATE 115200 20 #define CONFIG_BOOTDELAY 3 21 #define CONFIG_BOOTARGS "console=ttySC0,115200 root=1f01" 22 23 #define CONFIG_VERSION_VARIABLE 24 #undef CONFIG_SHOW_BOOT_PROGRESS 25 26 /* SMC9111 */ 27 #define CONFIG_SMC91111 28 #define CONFIG_SMC91111_BASE (0xB0000000) 29 30 /* MEMORY */ 31 #define MIGO_R_SDRAM_BASE (0x8C000000) 32 #define MIGO_R_FLASH_BASE_1 (0xA0000000) 33 #define MIGO_R_FLASH_BANK_SIZE (64 * 1024 * 1024) 34 35 #define CONFIG_SYS_TEXT_BASE 0x8FFC0000 36 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 37 #define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */ 38 #define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */ 39 #define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */ 40 #define CONFIG_SYS_BARGSIZE 512 /* Buffer size for Boot Arguments passed to kernel */ 41 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate settings for this board */ 42 43 /* SCIF */ 44 #define CONFIG_SCIF_CONSOLE 1 45 #define CONFIG_CONS_SCIF0 1 46 #undef CONFIG_SYS_CONSOLE_INFO_QUIET /* Suppress display of console 47 information at boot */ 48 #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 49 #undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE 50 51 #define CONFIG_SYS_MEMTEST_START (MIGO_R_SDRAM_BASE) 52 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024)) 53 54 /* Enable alternate, more extensive, memory test */ 55 #undef CONFIG_SYS_ALT_MEMTEST 56 /* Scratch address used by the alternate memory test */ 57 #undef CONFIG_SYS_MEMTEST_SCRATCH 58 59 /* Enable temporary baudrate change while serial download */ 60 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 61 62 #define CONFIG_SYS_SDRAM_BASE (MIGO_R_SDRAM_BASE) 63 /* maybe more, but if so u-boot doesn't know about it... */ 64 #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) 65 /* default load address for scripts ?!? */ 66 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024) 67 68 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ 69 #define CONFIG_SYS_MONITOR_BASE (MIGO_R_FLASH_BASE_1) 70 /* Monitor size */ 71 #define CONFIG_SYS_MONITOR_LEN (128 * 1024) 72 /* Size of DRAM reserved for malloc() use */ 73 #define CONFIG_SYS_MALLOC_LEN (256 * 1024) 74 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 75 76 /* FLASH */ 77 #define CONFIG_SYS_FLASH_CFI 78 #define CONFIG_FLASH_CFI_DRIVER 79 #undef CONFIG_SYS_FLASH_QUIET_TEST 80 /* print 'E' for empty sector on flinfo */ 81 #define CONFIG_SYS_FLASH_EMPTY_INFO 82 /* Physical start address of Flash memory */ 83 #define CONFIG_SYS_FLASH_BASE (MIGO_R_FLASH_BASE_1) 84 /* Max number of sectors on each Flash chip */ 85 #define CONFIG_SYS_MAX_FLASH_SECT 512 86 87 /* if you use all NOR Flash , you change dip-switch. Please see MIGO_R01 Manual. */ 88 #define CONFIG_SYS_MAX_FLASH_BANKS 1 89 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE + (0 * MIGO_R_FLASH_BANK_SIZE) } 90 91 /* Timeout for Flash erase operations (in ms) */ 92 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) 93 /* Timeout for Flash write operations (in ms) */ 94 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) 95 /* Timeout for Flash set sector lock bit operations (in ms) */ 96 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) 97 /* Timeout for Flash clear lock bit operations (in ms) */ 98 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) 99 100 /* Use hardware flash sectors protection instead of U-Boot software protection */ 101 #undef CONFIG_SYS_FLASH_PROTECTION 102 #undef CONFIG_SYS_DIRECT_FLASH_TFTP 103 104 /* ENV setting */ 105 #define CONFIG_ENV_IS_IN_FLASH 106 #define CONFIG_ENV_OVERWRITE 1 107 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 108 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 109 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) 110 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ 111 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) 112 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) 113 114 /* Board Clock */ 115 #define CONFIG_SYS_CLK_FREQ 33333333 116 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 117 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 118 #define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */ 119 120 #endif /* __MIGO_R_H */ 121