1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Configuation settings for the Renesas Solutions Migo-R board 4 * 5 * Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 6 */ 7 8 #ifndef __MIGO_R_H 9 #define __MIGO_R_H 10 11 #define CONFIG_CPU_SH7722 1 12 13 #define CONFIG_DISPLAY_BOARDINFO 14 #undef CONFIG_SHOW_BOOT_PROGRESS 15 16 /* SMC9111 */ 17 #define CONFIG_SMC91111 18 #define CONFIG_SMC91111_BASE (0xB0000000) 19 20 /* MEMORY */ 21 #define MIGO_R_SDRAM_BASE (0x8C000000) 22 #define MIGO_R_FLASH_BASE_1 (0xA0000000) 23 #define MIGO_R_FLASH_BANK_SIZE (64 * 1024 * 1024) 24 25 #define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */ 26 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate settings for this board */ 27 28 /* SCIF */ 29 #define CONFIG_CONS_SCIF0 1 30 31 #define CONFIG_SYS_MEMTEST_START (MIGO_R_SDRAM_BASE) 32 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024)) 33 34 /* Enable alternate, more extensive, memory test */ 35 /* Scratch address used by the alternate memory test */ 36 #undef CONFIG_SYS_MEMTEST_SCRATCH 37 38 /* Enable temporary baudrate change while serial download */ 39 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 40 41 #define CONFIG_SYS_SDRAM_BASE (MIGO_R_SDRAM_BASE) 42 /* maybe more, but if so u-boot doesn't know about it... */ 43 #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) 44 /* default load address for scripts ?!? */ 45 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024) 46 47 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ 48 #define CONFIG_SYS_MONITOR_BASE (MIGO_R_FLASH_BASE_1) 49 /* Monitor size */ 50 #define CONFIG_SYS_MONITOR_LEN (128 * 1024) 51 /* Size of DRAM reserved for malloc() use */ 52 #define CONFIG_SYS_MALLOC_LEN (256 * 1024) 53 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 54 55 /* FLASH */ 56 #define CONFIG_SYS_FLASH_CFI 57 #define CONFIG_FLASH_CFI_DRIVER 58 #undef CONFIG_SYS_FLASH_QUIET_TEST 59 /* print 'E' for empty sector on flinfo */ 60 #define CONFIG_SYS_FLASH_EMPTY_INFO 61 /* Physical start address of Flash memory */ 62 #define CONFIG_SYS_FLASH_BASE (MIGO_R_FLASH_BASE_1) 63 /* Max number of sectors on each Flash chip */ 64 #define CONFIG_SYS_MAX_FLASH_SECT 512 65 66 /* if you use all NOR Flash , you change dip-switch. Please see MIGO_R01 Manual. */ 67 #define CONFIG_SYS_MAX_FLASH_BANKS 1 68 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE + (0 * MIGO_R_FLASH_BANK_SIZE) } 69 70 /* Timeout for Flash erase operations (in ms) */ 71 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) 72 /* Timeout for Flash write operations (in ms) */ 73 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) 74 /* Timeout for Flash set sector lock bit operations (in ms) */ 75 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) 76 /* Timeout for Flash clear lock bit operations (in ms) */ 77 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) 78 79 /* Use hardware flash sectors protection instead of U-Boot software protection */ 80 #undef CONFIG_SYS_FLASH_PROTECTION 81 #undef CONFIG_SYS_DIRECT_FLASH_TFTP 82 83 /* ENV setting */ 84 #define CONFIG_ENV_OVERWRITE 1 85 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 86 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 87 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) 88 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ 89 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) 90 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) 91 92 /* Board Clock */ 93 #define CONFIG_SYS_CLK_FREQ 33333333 94 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 95 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 96 #define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */ 97 98 #endif /* __MIGO_R_H */ 99