1 /* 2 * Configuation settings for the Renesas Solutions Migo-R board 3 * 4 * Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __MIGO_R_H 10 #define __MIGO_R_H 11 12 #define CONFIG_CPU_SH7722 1 13 14 #define CONFIG_DISPLAY_BOARDINFO 15 #undef CONFIG_SHOW_BOOT_PROGRESS 16 17 /* SMC9111 */ 18 #define CONFIG_SMC91111 19 #define CONFIG_SMC91111_BASE (0xB0000000) 20 21 /* MEMORY */ 22 #define MIGO_R_SDRAM_BASE (0x8C000000) 23 #define MIGO_R_FLASH_BASE_1 (0xA0000000) 24 #define MIGO_R_FLASH_BANK_SIZE (64 * 1024 * 1024) 25 26 #define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */ 27 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate settings for this board */ 28 29 /* SCIF */ 30 #define CONFIG_CONS_SCIF0 1 31 32 #define CONFIG_SYS_MEMTEST_START (MIGO_R_SDRAM_BASE) 33 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024)) 34 35 /* Enable alternate, more extensive, memory test */ 36 /* Scratch address used by the alternate memory test */ 37 #undef CONFIG_SYS_MEMTEST_SCRATCH 38 39 /* Enable temporary baudrate change while serial download */ 40 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 41 42 #define CONFIG_SYS_SDRAM_BASE (MIGO_R_SDRAM_BASE) 43 /* maybe more, but if so u-boot doesn't know about it... */ 44 #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) 45 /* default load address for scripts ?!? */ 46 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024) 47 48 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ 49 #define CONFIG_SYS_MONITOR_BASE (MIGO_R_FLASH_BASE_1) 50 /* Monitor size */ 51 #define CONFIG_SYS_MONITOR_LEN (128 * 1024) 52 /* Size of DRAM reserved for malloc() use */ 53 #define CONFIG_SYS_MALLOC_LEN (256 * 1024) 54 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 55 56 /* FLASH */ 57 #define CONFIG_SYS_FLASH_CFI 58 #define CONFIG_FLASH_CFI_DRIVER 59 #undef CONFIG_SYS_FLASH_QUIET_TEST 60 /* print 'E' for empty sector on flinfo */ 61 #define CONFIG_SYS_FLASH_EMPTY_INFO 62 /* Physical start address of Flash memory */ 63 #define CONFIG_SYS_FLASH_BASE (MIGO_R_FLASH_BASE_1) 64 /* Max number of sectors on each Flash chip */ 65 #define CONFIG_SYS_MAX_FLASH_SECT 512 66 67 /* if you use all NOR Flash , you change dip-switch. Please see MIGO_R01 Manual. */ 68 #define CONFIG_SYS_MAX_FLASH_BANKS 1 69 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE + (0 * MIGO_R_FLASH_BANK_SIZE) } 70 71 /* Timeout for Flash erase operations (in ms) */ 72 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) 73 /* Timeout for Flash write operations (in ms) */ 74 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) 75 /* Timeout for Flash set sector lock bit operations (in ms) */ 76 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) 77 /* Timeout for Flash clear lock bit operations (in ms) */ 78 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) 79 80 /* Use hardware flash sectors protection instead of U-Boot software protection */ 81 #undef CONFIG_SYS_FLASH_PROTECTION 82 #undef CONFIG_SYS_DIRECT_FLASH_TFTP 83 84 /* ENV setting */ 85 #define CONFIG_ENV_OVERWRITE 1 86 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 87 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 88 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) 89 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ 90 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) 91 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) 92 93 /* Board Clock */ 94 #define CONFIG_SYS_CLK_FREQ 33333333 95 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 96 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 97 #define CONFIG_SYS_TMU_CLK_DIV (4) /* 4 (default), 16, 64, 256 or 1024 */ 98 99 #endif /* __MIGO_R_H */ 100