xref: /openbmc/u-boot/include/configs/MCR3000.h (revision 3991f42e)
1 /*
2  * Copyright (C) 2010-2017 CS Systemes d'Information
3  * Christophe Leroy <christophe.leroy@c-s.fr>
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 
8 #ifndef __CONFIG_H
9 #define __CONFIG_H
10 
11 /* High Level Configuration Options */
12 #define CONFIG_BOARD_EARLY_INIT_F	1	/* Call board_early_init_f */
13 #define CONFIG_MISC_INIT_R		1	/* Call misc_init_r	*/
14 
15 #define CONFIG_EXTRA_ENV_SETTINGS					\
16 	"sdram_type=SDRAM\0"						\
17 	"flash_type=AM29LV160DB\0"					\
18 	"loadaddr=0x400000\0"						\
19 	"filename=uImage.lzma\0"					\
20 	"nfsroot=/opt/ofs\0"						\
21 	"dhcp_ip=ip=:::::eth0:dhcp\0"					\
22 	"console_args=console=ttyCPM0,115200N8\0"			\
23 	"flashboot=setenv bootargs "					\
24 		"${console_args} "					\
25 		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:"	\
26 		"mcr3k:eth0:off;"					\
27 		"${ofl_args}; "						\
28 		"bootm 0x04060000 - 0x04050000\0"			\
29 	"tftpboot=setenv bootargs "					\
30 		"${console_args} "					\
31 		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:"	\
32 		"mcr3k:eth0:off "					\
33 		"${ofl_args}; "						\
34 		"tftp ${loadaddr} ${filename};"				\
35 		"tftp 0xf00000 mcr3000.dtb;"				\
36 		"bootm ${loadaddr} - 0xf00000\0"			\
37 	"netboot=dhcp ${loadaddr} ${filename};"				\
38 		"tftp 0xf00000 mcr3000.dtb;"				\
39 		"setenv bootargs "					\
40 		"root=/dev/nfs rw "					\
41 		"${console_args} "					\
42 		"${dhcp_ip};"						\
43 		"bootm ${loadaddr} - 0xf00000\0"			\
44 	"nfsboot=setenv bootargs "					\
45 		"root=/dev/nfs rw nfsroot=${serverip}:${nfsroot} "	\
46 		"${console_args} "					\
47 		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:"	\
48 		"mcr3k:eth0:off;"					\
49 		"bootm 0x04060000 - 0x04050000\0"			\
50 	"dhcpboot=dhcp ${loadaddr} ${filename};"			\
51 		"tftp 0xf00000 mcr3000.dtb;"				\
52 		"setenv bootargs "					\
53 		"${console_args} "					\
54 		"${dhcp_ip} "						\
55 		"${ofl_args}; "						\
56 		"bootm ${loadaddr} - 0xf00000\0"
57 
58 #define CONFIG_BOOTDELAY		5
59 
60 #define CONFIG_IPADDR			192.168.0.3
61 #define CONFIG_SERVERIP			192.168.0.1
62 #define CONFIG_NETMASK			255.0.0.0
63 
64 #define CONFIG_BOOTCOMMAND		"run flashboot"
65 
66 #define CONFIG_LOADS_ECHO	1	/* echo on for serial download	*/
67 #undef	CONFIG_LOADS_BAUD_CHANGE	/* don't allow baudrate change	*/
68 
69 #define CONFIG_WATCHDOG		1	/* watchdog enabled */
70 
71 /* Miscellaneous configurable options */
72 #define	CONFIG_SYS_LONGHELP
73 
74 #define CONFIG_CMDLINE_EDITING		1
75 #ifdef	CONFIG_HUSH_PARSER
76 #define	CONFIG_SYS_PROMPT_HUSH_PS2	"S3K> "
77 #endif
78 
79 #define CONFIG_SYS_MEMTEST_START	0x00002000
80 #define CONFIG_SYS_MEMTEST_END		0x00800000
81 
82 #define	CONFIG_SYS_LOAD_ADDR		0x200000
83 
84 #define	CONFIG_SYS_HZ			1000
85 
86 /* Definitions for initial stack pointer and data area (in DPRAM) */
87 #define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_SYS_IMMR
88 #define	CONFIG_SYS_INIT_RAM_SIZE	0x2f00
89 #define	CONFIG_SYS_GBL_DATA_SIZE	64
90 #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - \
91 					 CONFIG_SYS_GBL_DATA_SIZE)
92 #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
93 
94 /* RAM configuration (note that CONFIG_SYS_SDRAM_BASE must be zero) */
95 #define	CONFIG_SYS_SDRAM_BASE		0x00000000
96 #define SDRAM_MAX_SIZE			(32 * 1024 * 1024)
97 
98 /* FLASH organization */
99 #define CONFIG_SYS_FLASH_BASE		CONFIG_SYS_TEXT_BASE
100 #define CONFIG_SYS_FLASH_CFI		1
101 #define CONFIG_FLASH_CFI_DRIVER		1
102 #define CONFIG_SYS_MAX_FLASH_BANKS	1
103 #define CONFIG_SYS_MAX_FLASH_SECT	35
104 #define CONFIG_SYS_FLASH_ERASE_TOUT	120000
105 #define CONFIG_SYS_FLASH_WRITE_TOUT	500
106 
107 /*
108  * For booting Linux, the board info and command line data
109  * have to be in the first 8 MB of memory, since this is
110  * the maximum mapped by the Linux kernel during initialization.
111  */
112 #define	CONFIG_SYS_BOOTMAPSZ		(8 << 20)
113 #define	CONFIG_SYS_MONITOR_LEN		(256 << 10)
114 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE
115 #define CONFIG_SYS_MALLOC_LEN		(4096 << 10)
116 
117 /* Environment Configuration */
118 
119 /* environment is in FLASH */
120 #define CONFIG_ENV_SECT_SIZE	(64 * 1024)
121 #define CONFIG_ENV_SIZE		CONFIG_ENV_SECT_SIZE
122 #define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
123 #define CONFIG_ENV_OFFSET	(CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
124 #define CONFIG_ENV_OVERWRITE	1
125 
126 /* Cache Configuration */
127 #define CONFIG_SYS_CACHELINE_SIZE	16
128 
129 /* Ethernet configuration part */
130 #define CONFIG_SYS_DISCOVER_PHY		1
131 #ifdef CONFIG_MPC8XX_FEC
132 #define CONFIG_MII_INIT			1
133 #endif
134 
135 /* NAND configuration part */
136 #define CONFIG_SYS_MAX_NAND_DEVICE	1
137 #define CONFIG_SYS_NAND_MAX_CHIPS	1
138 #define CONFIG_SYS_NAND_BASE		0x0C000000
139 
140 /* Internal Definitions */
141 
142 /* Boot Flags*/
143 #define	BOOTFLAG_COLD			0x01
144 #define BOOTFLAG_WARM			0x02
145 
146 #endif /* __CONFIG_H */
147