1 /* 2 * Configuation settings for the Motorola MC5282EVB board. 3 * 4 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 /* 10 * board/config.h - configuration options, board specific 11 */ 12 13 #ifndef _CONFIG_M5282EVB_H 14 #define _CONFIG_M5282EVB_H 15 16 /* 17 * High Level Configuration Options 18 * (easy to change) 19 */ 20 #define CONFIG_MCF52x2 /* define processor family */ 21 #define CONFIG_M5282 /* define processor type */ 22 23 #define CONFIG_MCFTMR 24 25 #define CONFIG_MCFUART 26 #define CONFIG_SYS_UART_PORT (0) 27 #define CONFIG_BAUDRATE 115200 28 29 #undef CONFIG_MONITOR_IS_IN_RAM /* define if monitor is started from a pre-loader */ 30 31 /* Configuration for environment 32 * Environment is embedded in u-boot in the second sector of the flash 33 */ 34 #define CONFIG_ENV_ADDR 0xffe04000 35 #define CONFIG_ENV_SIZE 0x2000 36 #define CONFIG_ENV_IS_IN_FLASH 1 37 38 /* 39 * BOOTP options 40 */ 41 #define CONFIG_BOOTP_BOOTFILESIZE 42 #define CONFIG_BOOTP_BOOTPATH 43 #define CONFIG_BOOTP_GATEWAY 44 #define CONFIG_BOOTP_HOSTNAME 45 46 /* 47 * Command line configuration. 48 */ 49 #include <config_cmd_default.h> 50 #define CONFIG_CMD_CACHE 51 #define CONFIG_CMD_NET 52 #define CONFIG_CMD_PING 53 #define CONFIG_CMD_MII 54 55 #undef CONFIG_CMD_LOADS 56 #undef CONFIG_CMD_LOADB 57 58 #define CONFIG_MCFFEC 59 #ifdef CONFIG_MCFFEC 60 # define CONFIG_MII 1 61 # define CONFIG_MII_INIT 1 62 # define CONFIG_SYS_DISCOVER_PHY 63 # define CONFIG_SYS_RX_ETH_BUFFER 8 64 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 65 66 # define CONFIG_SYS_FEC0_PINMUX 0 67 # define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE 68 # define MCFFEC_TOUT_LOOP 50000 69 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ 70 # ifndef CONFIG_SYS_DISCOVER_PHY 71 # define FECDUPLEX FULL 72 # define FECSPEED _100BASET 73 # else 74 # ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN 75 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 76 # endif 77 # endif /* CONFIG_SYS_DISCOVER_PHY */ 78 #endif 79 80 #define CONFIG_BOOTDELAY 5 81 #ifdef CONFIG_MCFFEC 82 # define CONFIG_ETHADDR 00:e0:0c:bc:e5:60 83 # define CONFIG_IPADDR 192.162.1.2 84 # define CONFIG_NETMASK 255.255.255.0 85 # define CONFIG_SERVERIP 192.162.1.1 86 # define CONFIG_GATEWAYIP 192.162.1.1 87 # define CONFIG_OVERWRITE_ETHADDR_ONCE 88 #endif /* CONFIG_MCFFEC */ 89 90 #define CONFIG_HOSTNAME M5282EVB 91 #define CONFIG_EXTRA_ENV_SETTINGS \ 92 "netdev=eth0\0" \ 93 "loadaddr=10000\0" \ 94 "u-boot=u-boot.bin\0" \ 95 "load=tftp ${loadaddr) ${u-boot}\0" \ 96 "upd=run load; run prog\0" \ 97 "prog=prot off ffe00000 ffe3ffff;" \ 98 "era ffe00000 ffe3ffff;" \ 99 "cp.b ${loadaddr} ffe00000 ${filesize};"\ 100 "save\0" \ 101 "" 102 103 #define CONFIG_SYS_PROMPT "-> " 104 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 105 106 #if defined(CONFIG_CMD_KGDB) 107 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 108 #else 109 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 110 #endif 111 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ 112 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 113 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 114 115 #define CONFIG_SYS_LOAD_ADDR 0x20000 116 117 #define CONFIG_SYS_MEMTEST_START 0x400 118 #define CONFIG_SYS_MEMTEST_END 0x380000 119 120 #define CONFIG_SYS_HZ 1000 121 #define CONFIG_SYS_CLK 64000000 122 123 /* PLL Configuration: Ext Clock * 6 (see table 9-4 of MCF user manual) */ 124 125 #define CONFIG_SYS_MFD 0x02 /* PLL Multiplication Factor Devider */ 126 #define CONFIG_SYS_RFD 0x00 /* PLL Reduce Frecuency Devider */ 127 128 /* 129 * Low Level Configuration Settings 130 * (address mappings, register initial values, etc.) 131 * You should know what you are doing if you make changes here. 132 */ 133 #define CONFIG_SYS_MBAR 0x40000000 134 135 /*----------------------------------------------------------------------- 136 * Definitions for initial stack pointer and data area (in DPRAM) 137 */ 138 #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 139 #define CONFIG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */ 140 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 141 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 142 143 /*----------------------------------------------------------------------- 144 * Start addresses for the final memory configuration 145 * (Set up by the startup code) 146 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 147 */ 148 #define CONFIG_SYS_SDRAM_BASE 0x00000000 149 #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ 150 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE 151 #define CONFIG_SYS_INT_FLASH_BASE 0xf0000000 152 #define CONFIG_SYS_INT_FLASH_ENABLE 0x21 153 154 /* If M5282 port is fully implemented the monitor base will be behind 155 * the vector table. */ 156 #if (CONFIG_SYS_TEXT_BASE != CONFIG_SYS_INT_FLASH_BASE) 157 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) 158 #else 159 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x418) /* 24 Byte for CFM-Config */ 160 #endif 161 162 #define CONFIG_SYS_MONITOR_LEN 0x20000 163 #define CONFIG_SYS_MALLOC_LEN (256 << 10) 164 #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 165 166 /* 167 * For booting Linux, the board info and command line data 168 * have to be in the first 8 MB of memory, since this is 169 * the maximum mapped by the Linux kernel during initialization ?? 170 */ 171 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) 172 173 /*----------------------------------------------------------------------- 174 * FLASH organization 175 */ 176 #define CONFIG_SYS_FLASH_CFI 177 #ifdef CONFIG_SYS_FLASH_CFI 178 179 # define CONFIG_FLASH_CFI_DRIVER 1 180 # define CONFIG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */ 181 # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 182 # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 183 # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ 184 # define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ 185 # define CONFIG_SYS_FLASH_CHECKSUM 186 # define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 187 #endif 188 189 /*----------------------------------------------------------------------- 190 * Cache Configuration 191 */ 192 #define CONFIG_SYS_CACHELINE_SIZE 16 193 194 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 195 CONFIG_SYS_INIT_RAM_SIZE - 8) 196 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 197 CONFIG_SYS_INIT_RAM_SIZE - 4) 198 #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV + CF_CACR_DCM) 199 #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ 200 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ 201 CF_ACR_EN | CF_ACR_SM_ALL) 202 #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_DISD | \ 203 CF_CACR_CEIB | CF_CACR_DBWE | \ 204 CF_CACR_EUSP) 205 206 /*----------------------------------------------------------------------- 207 * Memory bank definitions 208 */ 209 #define CONFIG_SYS_CS0_BASE 0xFFE00000 210 #define CONFIG_SYS_CS0_CTRL 0x00001980 211 #define CONFIG_SYS_CS0_MASK 0x001F0001 212 213 /*----------------------------------------------------------------------- 214 * Port configuration 215 */ 216 #define CONFIG_SYS_PACNT 0x0000000 /* Port A D[31:24] */ 217 #define CONFIG_SYS_PADDR 0x0000000 218 #define CONFIG_SYS_PADAT 0x0000000 219 220 #define CONFIG_SYS_PBCNT 0x0000000 /* Port B D[23:16] */ 221 #define CONFIG_SYS_PBDDR 0x0000000 222 #define CONFIG_SYS_PBDAT 0x0000000 223 224 #define CONFIG_SYS_PCCNT 0x0000000 /* Port C D[15:08] */ 225 #define CONFIG_SYS_PCDDR 0x0000000 226 #define CONFIG_SYS_PCDAT 0x0000000 227 228 #define CONFIG_SYS_PDCNT 0x0000000 /* Port D D[07:00] */ 229 #define CONFIG_SYS_PCDDR 0x0000000 230 #define CONFIG_SYS_PCDAT 0x0000000 231 232 #define CONFIG_SYS_PEHLPAR 0xC0 233 #define CONFIG_SYS_PUAPAR 0x0F /* UA0..UA3 = Uart 0 +1 */ 234 #define CONFIG_SYS_DDRUA 0x05 235 #define CONFIG_SYS_PJPAR 0xFF 236 237 #endif /* _CONFIG_M5282EVB_H */ 238