1 /* 2 * Configuation settings for the Motorola MC5282EVB board. 3 * 4 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de> 5 * 6 * See file CREDITS for list of people who contributed to this 7 * project. 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of 12 * the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22 * MA 02111-1307 USA 23 */ 24 25 /* 26 * board/config.h - configuration options, board specific 27 */ 28 29 #ifndef _CONFIG_M5282EVB_H 30 #define _CONFIG_M5282EVB_H 31 32 /* 33 * High Level Configuration Options 34 * (easy to change) 35 */ 36 #define CONFIG_MCF52x2 /* define processor family */ 37 #define CONFIG_M5282 /* define processor type */ 38 39 #define CONFIG_MCFTMR 40 41 #define CONFIG_MCFUART 42 #define CONFIG_SYS_UART_PORT (0) 43 #define CONFIG_BAUDRATE 115200 44 #define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 } 45 46 #undef CONFIG_MONITOR_IS_IN_RAM /* define if monitor is started from a pre-loader */ 47 48 /* Configuration for environment 49 * Environment is embedded in u-boot in the second sector of the flash 50 */ 51 #define CONFIG_ENV_ADDR 0xffe04000 52 #define CONFIG_ENV_SIZE 0x2000 53 #define CONFIG_ENV_IS_IN_FLASH 1 54 55 /* 56 * BOOTP options 57 */ 58 #define CONFIG_BOOTP_BOOTFILESIZE 59 #define CONFIG_BOOTP_BOOTPATH 60 #define CONFIG_BOOTP_GATEWAY 61 #define CONFIG_BOOTP_HOSTNAME 62 63 /* 64 * Command line configuration. 65 */ 66 #include <config_cmd_default.h> 67 #define CONFIG_CMD_CACHE 68 #define CONFIG_CMD_NET 69 #define CONFIG_CMD_PING 70 #define CONFIG_CMD_MII 71 72 #undef CONFIG_CMD_LOADS 73 #undef CONFIG_CMD_LOADB 74 75 #define CONFIG_MCFFEC 76 #ifdef CONFIG_MCFFEC 77 # define CONFIG_MII 1 78 # define CONFIG_MII_INIT 1 79 # define CONFIG_SYS_DISCOVER_PHY 80 # define CONFIG_SYS_RX_ETH_BUFFER 8 81 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 82 83 # define CONFIG_SYS_FEC0_PINMUX 0 84 # define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE 85 # define MCFFEC_TOUT_LOOP 50000 86 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ 87 # ifndef CONFIG_SYS_DISCOVER_PHY 88 # define FECDUPLEX FULL 89 # define FECSPEED _100BASET 90 # else 91 # ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN 92 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 93 # endif 94 # endif /* CONFIG_SYS_DISCOVER_PHY */ 95 #endif 96 97 #define CONFIG_BOOTDELAY 5 98 #ifdef CONFIG_MCFFEC 99 # define CONFIG_ETHADDR 00:e0:0c:bc:e5:60 100 # define CONFIG_IPADDR 192.162.1.2 101 # define CONFIG_NETMASK 255.255.255.0 102 # define CONFIG_SERVERIP 192.162.1.1 103 # define CONFIG_GATEWAYIP 192.162.1.1 104 # define CONFIG_OVERWRITE_ETHADDR_ONCE 105 #endif /* CONFIG_MCFFEC */ 106 107 #define CONFIG_HOSTNAME M5282EVB 108 #define CONFIG_EXTRA_ENV_SETTINGS \ 109 "netdev=eth0\0" \ 110 "loadaddr=10000\0" \ 111 "u-boot=u-boot.bin\0" \ 112 "load=tftp ${loadaddr) ${u-boot}\0" \ 113 "upd=run load; run prog\0" \ 114 "prog=prot off ffe00000 ffe3ffff;" \ 115 "era ffe00000 ffe3ffff;" \ 116 "cp.b ${loadaddr} ffe00000 ${filesize};"\ 117 "save\0" \ 118 "" 119 120 #define CONFIG_SYS_PROMPT "-> " 121 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 122 123 #if defined(CONFIG_CMD_KGDB) 124 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 125 #else 126 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 127 #endif 128 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ 129 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 130 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 131 132 #define CONFIG_SYS_LOAD_ADDR 0x20000 133 134 #define CONFIG_SYS_MEMTEST_START 0x400 135 #define CONFIG_SYS_MEMTEST_END 0x380000 136 137 #define CONFIG_SYS_HZ 1000 138 #define CONFIG_SYS_CLK 64000000 139 140 /* PLL Configuration: Ext Clock * 6 (see table 9-4 of MCF user manual) */ 141 142 #define CONFIG_SYS_MFD 0x02 /* PLL Multiplication Factor Devider */ 143 #define CONFIG_SYS_RFD 0x00 /* PLL Reduce Frecuency Devider */ 144 145 /* 146 * Low Level Configuration Settings 147 * (address mappings, register initial values, etc.) 148 * You should know what you are doing if you make changes here. 149 */ 150 #define CONFIG_SYS_MBAR 0x40000000 151 152 /*----------------------------------------------------------------------- 153 * Definitions for initial stack pointer and data area (in DPRAM) 154 */ 155 #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 156 #define CONFIG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */ 157 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 158 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 159 160 /*----------------------------------------------------------------------- 161 * Start addresses for the final memory configuration 162 * (Set up by the startup code) 163 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 164 */ 165 #define CONFIG_SYS_SDRAM_BASE 0x00000000 166 #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ 167 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE 168 #define CONFIG_SYS_INT_FLASH_BASE 0xf0000000 169 #define CONFIG_SYS_INT_FLASH_ENABLE 0x21 170 171 /* If M5282 port is fully implemented the monitor base will be behind 172 * the vector table. */ 173 #if (CONFIG_SYS_TEXT_BASE != CONFIG_SYS_INT_FLASH_BASE) 174 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) 175 #else 176 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x418) /* 24 Byte for CFM-Config */ 177 #endif 178 179 #define CONFIG_SYS_MONITOR_LEN 0x20000 180 #define CONFIG_SYS_MALLOC_LEN (256 << 10) 181 #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 182 183 /* 184 * For booting Linux, the board info and command line data 185 * have to be in the first 8 MB of memory, since this is 186 * the maximum mapped by the Linux kernel during initialization ?? 187 */ 188 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) 189 190 /*----------------------------------------------------------------------- 191 * FLASH organization 192 */ 193 #define CONFIG_SYS_FLASH_CFI 194 #ifdef CONFIG_SYS_FLASH_CFI 195 196 # define CONFIG_FLASH_CFI_DRIVER 1 197 # define CONFIG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */ 198 # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 199 # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 200 # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ 201 # define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ 202 # define CONFIG_SYS_FLASH_CHECKSUM 203 # define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 204 #endif 205 206 /*----------------------------------------------------------------------- 207 * Cache Configuration 208 */ 209 #define CONFIG_SYS_CACHELINE_SIZE 16 210 211 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 212 CONFIG_SYS_INIT_RAM_SIZE - 8) 213 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 214 CONFIG_SYS_INIT_RAM_SIZE - 4) 215 #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV + CF_CACR_DCM) 216 #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ 217 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ 218 CF_ACR_EN | CF_ACR_SM_ALL) 219 #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_DISD | \ 220 CF_CACR_CEIB | CF_CACR_DBWE | \ 221 CF_CACR_EUSP) 222 223 /*----------------------------------------------------------------------- 224 * Memory bank definitions 225 */ 226 #define CONFIG_SYS_CS0_BASE 0xFFE00000 227 #define CONFIG_SYS_CS0_CTRL 0x00001980 228 #define CONFIG_SYS_CS0_MASK 0x001F0001 229 230 /*----------------------------------------------------------------------- 231 * Port configuration 232 */ 233 #define CONFIG_SYS_PACNT 0x0000000 /* Port A D[31:24] */ 234 #define CONFIG_SYS_PADDR 0x0000000 235 #define CONFIG_SYS_PADAT 0x0000000 236 237 #define CONFIG_SYS_PBCNT 0x0000000 /* Port B D[23:16] */ 238 #define CONFIG_SYS_PBDDR 0x0000000 239 #define CONFIG_SYS_PBDAT 0x0000000 240 241 #define CONFIG_SYS_PCCNT 0x0000000 /* Port C D[15:08] */ 242 #define CONFIG_SYS_PCDDR 0x0000000 243 #define CONFIG_SYS_PCDAT 0x0000000 244 245 #define CONFIG_SYS_PDCNT 0x0000000 /* Port D D[07:00] */ 246 #define CONFIG_SYS_PCDDR 0x0000000 247 #define CONFIG_SYS_PCDAT 0x0000000 248 249 #define CONFIG_SYS_PEHLPAR 0xC0 250 #define CONFIG_SYS_PUAPAR 0x0F /* UA0..UA3 = Uart 0 +1 */ 251 #define CONFIG_SYS_DDRUA 0x05 252 #define CONFIG_SYS_PJPAR 0xFF 253 254 #endif /* _CONFIG_M5282EVB_H */ 255