1 /* 2 * Configuation settings for the Motorola MC5282EVB board. 3 * 4 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 /* 10 * board/config.h - configuration options, board specific 11 */ 12 13 #ifndef _CONFIG_M5282EVB_H 14 #define _CONFIG_M5282EVB_H 15 16 /* 17 * High Level Configuration Options 18 * (easy to change) 19 */ 20 #define CONFIG_MCFTMR 21 22 #define CONFIG_MCFUART 23 #define CONFIG_SYS_UART_PORT (0) 24 25 #undef CONFIG_MONITOR_IS_IN_RAM /* define if monitor is started from a pre-loader */ 26 27 /* Configuration for environment 28 * Environment is embedded in u-boot in the second sector of the flash 29 */ 30 #define CONFIG_ENV_ADDR 0xffe04000 31 #define CONFIG_ENV_SIZE 0x2000 32 #define CONFIG_ENV_IS_IN_FLASH 1 33 34 #define LDS_BOARD_TEXT \ 35 . = DEFINED(env_offset) ? env_offset : .; \ 36 common/env_embedded.o (.text*); 37 38 /* 39 * BOOTP options 40 */ 41 #define CONFIG_BOOTP_BOOTFILESIZE 42 #define CONFIG_BOOTP_BOOTPATH 43 #define CONFIG_BOOTP_GATEWAY 44 #define CONFIG_BOOTP_HOSTNAME 45 46 /* 47 * Command line configuration. 48 */ 49 50 #define CONFIG_MCFFEC 51 #ifdef CONFIG_MCFFEC 52 # define CONFIG_MII 1 53 # define CONFIG_MII_INIT 1 54 # define CONFIG_SYS_DISCOVER_PHY 55 # define CONFIG_SYS_RX_ETH_BUFFER 8 56 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 57 58 # define CONFIG_SYS_FEC0_PINMUX 0 59 # define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE 60 # define MCFFEC_TOUT_LOOP 50000 61 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ 62 # ifndef CONFIG_SYS_DISCOVER_PHY 63 # define FECDUPLEX FULL 64 # define FECSPEED _100BASET 65 # else 66 # ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN 67 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 68 # endif 69 # endif /* CONFIG_SYS_DISCOVER_PHY */ 70 #endif 71 72 #ifdef CONFIG_MCFFEC 73 # define CONFIG_IPADDR 192.162.1.2 74 # define CONFIG_NETMASK 255.255.255.0 75 # define CONFIG_SERVERIP 192.162.1.1 76 # define CONFIG_GATEWAYIP 192.162.1.1 77 #endif /* CONFIG_MCFFEC */ 78 79 #define CONFIG_HOSTNAME M5282EVB 80 #define CONFIG_EXTRA_ENV_SETTINGS \ 81 "netdev=eth0\0" \ 82 "loadaddr=10000\0" \ 83 "u-boot=u-boot.bin\0" \ 84 "load=tftp ${loadaddr) ${u-boot}\0" \ 85 "upd=run load; run prog\0" \ 86 "prog=prot off ffe00000 ffe3ffff;" \ 87 "era ffe00000 ffe3ffff;" \ 88 "cp.b ${loadaddr} ffe00000 ${filesize};"\ 89 "save\0" \ 90 "" 91 92 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 93 94 #if defined(CONFIG_CMD_KGDB) 95 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 96 #else 97 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 98 #endif 99 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ 100 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 101 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 102 103 #define CONFIG_SYS_LOAD_ADDR 0x20000 104 105 #define CONFIG_SYS_MEMTEST_START 0x400 106 #define CONFIG_SYS_MEMTEST_END 0x380000 107 108 #define CONFIG_SYS_CLK 64000000 109 110 /* PLL Configuration: Ext Clock * 6 (see table 9-4 of MCF user manual) */ 111 112 #define CONFIG_SYS_MFD 0x02 /* PLL Multiplication Factor Devider */ 113 #define CONFIG_SYS_RFD 0x00 /* PLL Reduce Frecuency Devider */ 114 115 /* 116 * Low Level Configuration Settings 117 * (address mappings, register initial values, etc.) 118 * You should know what you are doing if you make changes here. 119 */ 120 #define CONFIG_SYS_MBAR 0x40000000 121 122 /*----------------------------------------------------------------------- 123 * Definitions for initial stack pointer and data area (in DPRAM) 124 */ 125 #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 126 #define CONFIG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */ 127 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 128 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 129 130 /*----------------------------------------------------------------------- 131 * Start addresses for the final memory configuration 132 * (Set up by the startup code) 133 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 134 */ 135 #define CONFIG_SYS_SDRAM_BASE 0x00000000 136 #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ 137 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE 138 #define CONFIG_SYS_INT_FLASH_BASE 0xf0000000 139 #define CONFIG_SYS_INT_FLASH_ENABLE 0x21 140 141 /* If M5282 port is fully implemented the monitor base will be behind 142 * the vector table. */ 143 #if (CONFIG_SYS_TEXT_BASE != CONFIG_SYS_INT_FLASH_BASE) 144 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) 145 #else 146 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x418) /* 24 Byte for CFM-Config */ 147 #endif 148 149 #define CONFIG_SYS_MONITOR_LEN 0x20000 150 #define CONFIG_SYS_MALLOC_LEN (256 << 10) 151 #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 152 153 /* 154 * For booting Linux, the board info and command line data 155 * have to be in the first 8 MB of memory, since this is 156 * the maximum mapped by the Linux kernel during initialization ?? 157 */ 158 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) 159 160 /*----------------------------------------------------------------------- 161 * FLASH organization 162 */ 163 #define CONFIG_SYS_FLASH_CFI 164 #ifdef CONFIG_SYS_FLASH_CFI 165 166 # define CONFIG_FLASH_CFI_DRIVER 1 167 # define CONFIG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */ 168 # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 169 # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 170 # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ 171 # define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ 172 # define CONFIG_SYS_FLASH_CHECKSUM 173 # define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 174 #endif 175 176 /*----------------------------------------------------------------------- 177 * Cache Configuration 178 */ 179 #define CONFIG_SYS_CACHELINE_SIZE 16 180 181 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 182 CONFIG_SYS_INIT_RAM_SIZE - 8) 183 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 184 CONFIG_SYS_INIT_RAM_SIZE - 4) 185 #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV + CF_CACR_DCM) 186 #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ 187 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ 188 CF_ACR_EN | CF_ACR_SM_ALL) 189 #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_DISD | \ 190 CF_CACR_CEIB | CF_CACR_DBWE | \ 191 CF_CACR_EUSP) 192 193 /*----------------------------------------------------------------------- 194 * Memory bank definitions 195 */ 196 #define CONFIG_SYS_CS0_BASE 0xFFE00000 197 #define CONFIG_SYS_CS0_CTRL 0x00001980 198 #define CONFIG_SYS_CS0_MASK 0x001F0001 199 200 /*----------------------------------------------------------------------- 201 * Port configuration 202 */ 203 #define CONFIG_SYS_PACNT 0x0000000 /* Port A D[31:24] */ 204 #define CONFIG_SYS_PADDR 0x0000000 205 #define CONFIG_SYS_PADAT 0x0000000 206 207 #define CONFIG_SYS_PBCNT 0x0000000 /* Port B D[23:16] */ 208 #define CONFIG_SYS_PBDDR 0x0000000 209 #define CONFIG_SYS_PBDAT 0x0000000 210 211 #define CONFIG_SYS_PCCNT 0x0000000 /* Port C D[15:08] */ 212 #define CONFIG_SYS_PCDDR 0x0000000 213 #define CONFIG_SYS_PCDAT 0x0000000 214 215 #define CONFIG_SYS_PDCNT 0x0000000 /* Port D D[07:00] */ 216 #define CONFIG_SYS_PCDDR 0x0000000 217 #define CONFIG_SYS_PCDAT 0x0000000 218 219 #define CONFIG_SYS_PEHLPAR 0xC0 220 #define CONFIG_SYS_PUAPAR 0x0F /* UA0..UA3 = Uart 0 +1 */ 221 #define CONFIG_SYS_DDRUA 0x05 222 #define CONFIG_SYS_PJPAR 0xFF 223 224 #endif /* _CONFIG_M5282EVB_H */ 225