1 /* 2 * Configuation settings for the Motorola MC5275EVB board. 3 * 4 * By Arthur Shipkowski <art@videon-central.com> 5 * Copyright (C) 2005 Videon Central, Inc. 6 * 7 * Based off of M5272C3 board code by Josef Baumgartner 8 * <josef.baumgartner@telex.de> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 /* 14 * board/config.h - configuration options, board specific 15 */ 16 17 #ifndef _M5275EVB_H 18 #define _M5275EVB_H 19 20 /* 21 * High Level Configuration Options 22 * (easy to change) 23 */ 24 #define CONFIG_M5275EVB /* define board type */ 25 26 #define CONFIG_MCFTMR 27 28 #define CONFIG_MCFUART 29 #define CONFIG_SYS_UART_PORT (0) 30 #define CONFIG_BAUDRATE 115200 31 32 /* Configuration for environment 33 * Environment is embedded in u-boot in the second sector of the flash 34 */ 35 #ifndef CONFIG_MONITOR_IS_IN_RAM 36 #define CONFIG_ENV_OFFSET 0x4000 37 #define CONFIG_ENV_SECT_SIZE 0x2000 38 #define CONFIG_ENV_IS_IN_FLASH 1 39 #else 40 #define CONFIG_ENV_ADDR 0xffe04000 41 #define CONFIG_ENV_SECT_SIZE 0x2000 42 #define CONFIG_ENV_IS_IN_FLASH 1 43 #endif 44 45 /* 46 * BOOTP options 47 */ 48 #define CONFIG_BOOTP_BOOTFILESIZE 49 #define CONFIG_BOOTP_BOOTPATH 50 #define CONFIG_BOOTP_GATEWAY 51 #define CONFIG_BOOTP_HOSTNAME 52 53 /* Available command configuration */ 54 #include <config_cmd_default.h> 55 56 #define CONFIG_CMD_CACHE 57 #define CONFIG_CMD_PING 58 #define CONFIG_CMD_MII 59 #define CONFIG_CMD_NET 60 #define CONFIG_CMD_ELF 61 #define CONFIG_CMD_FLASH 62 #define CONFIG_CMD_I2C 63 #define CONFIG_CMD_MEMORY 64 #define CONFIG_CMD_DHCP 65 66 #undef CONFIG_CMD_LOADS 67 #undef CONFIG_CMD_LOADB 68 69 #define CONFIG_MCFFEC 70 #ifdef CONFIG_MCFFEC 71 #define CONFIG_MII 1 72 #define CONFIG_MII_INIT 1 73 #define CONFIG_SYS_DISCOVER_PHY 74 #define CONFIG_SYS_RX_ETH_BUFFER 8 75 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 76 #define CONFIG_SYS_FEC0_PINMUX 0 77 #define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE 78 #define CONFIG_SYS_FEC1_PINMUX 0 79 #define CONFIG_SYS_FEC1_MIIBASE CONFIG_SYS_FEC1_IOBASE 80 #define MCFFEC_TOUT_LOOP 50000 81 #define CONFIG_HAS_ETH1 82 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ 83 #ifndef CONFIG_SYS_DISCOVER_PHY 84 #define FECDUPLEX FULL 85 #define FECSPEED _100BASET 86 #else 87 #ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN 88 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 89 #endif 90 #endif 91 #endif 92 93 /* I2C */ 94 #define CONFIG_SYS_I2C 95 #define CONFIG_SYS_I2C_FSL 96 #define CONFIG_SYS_FSL_I2C_SPEED 80000 97 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F 98 #define CONFIG_SYS_FSL_I2C_OFFSET 0x00000300 99 #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR 100 #define CONFIG_SYS_I2C_PINMUX_REG (gpio_reg->par_feci2c) 101 #define CONFIG_SYS_I2C_PINMUX_CLR (0xFFF0) 102 #define CONFIG_SYS_I2C_PINMUX_SET (0x000F) 103 104 #define CONFIG_SYS_PROMPT "-> " 105 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 106 107 #if (CONFIG_CMD_KGDB) 108 # define CONFIG_SYS_CBSIZE 1024 109 #else 110 # define CONFIG_SYS_CBSIZE 256 111 #endif 112 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 113 #define CONFIG_SYS_MAXARGS 16 114 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 115 116 #define CONFIG_SYS_LOAD_ADDR 0x800000 117 118 #define CONFIG_BOOTDELAY 5 119 #define CONFIG_BOOTCOMMAND "bootm ffe40000" 120 #define CONFIG_SYS_MEMTEST_START 0x400 121 #define CONFIG_SYS_MEMTEST_END 0x380000 122 123 #ifdef CONFIG_MCFFEC 124 # define CONFIG_NET_RETRY_COUNT 5 125 # define CONFIG_OVERWRITE_ETHADDR_ONCE 126 #endif /* FEC_ENET */ 127 128 #define CONFIG_EXTRA_ENV_SETTINGS \ 129 "netdev=eth0\0" \ 130 "loadaddr=10000\0" \ 131 "uboot=u-boot.bin\0" \ 132 "load=tftp ${loadaddr} ${uboot}\0" \ 133 "upd=run load; run prog\0" \ 134 "prog=prot off ffe00000 ffe3ffff;" \ 135 "era ffe00000 ffe3ffff;" \ 136 "cp.b ${loadaddr} ffe00000 ${filesize};"\ 137 "save\0" \ 138 "" 139 140 #define CONFIG_SYS_CLK 150000000 141 142 /* 143 * Low Level Configuration Settings 144 * (address mappings, register initial values, etc.) 145 * You should know what you are doing if you make changes here. 146 */ 147 148 #define CONFIG_SYS_MBAR 0x40000000 149 150 /*----------------------------------------------------------------------- 151 * Definitions for initial stack pointer and data area (in DPRAM) 152 */ 153 #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 154 #define CONFIG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */ 155 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 156 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 157 158 /*----------------------------------------------------------------------- 159 * Start addresses for the final memory configuration 160 * (Set up by the startup code) 161 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 162 */ 163 #define CONFIG_SYS_SDRAM_BASE 0x00000000 164 #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ 165 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE 166 167 #ifdef CONFIG_MONITOR_IS_IN_RAM 168 #define CONFIG_SYS_MONITOR_BASE 0x20000 169 #else 170 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) 171 #endif 172 173 #define CONFIG_SYS_MONITOR_LEN 0x20000 174 #define CONFIG_SYS_MALLOC_LEN (256 << 10) 175 #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 176 177 /* 178 * For booting Linux, the board info and command line data 179 * have to be in the first 8 MB of memory, since this is 180 * the maximum mapped by the Linux kernel during initialization ?? 181 */ 182 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) 183 #define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20) 184 185 /*----------------------------------------------------------------------- 186 * FLASH organization 187 */ 188 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 189 #define CONFIG_SYS_MAX_FLASH_SECT 11 /* max number of sectors on one chip */ 190 #define CONFIG_SYS_FLASH_ERASE_TOUT 1000 191 192 #define CONFIG_SYS_FLASH_CFI 1 193 #define CONFIG_FLASH_CFI_DRIVER 1 194 #define CONFIG_SYS_FLASH_SIZE 0x200000 195 196 /*----------------------------------------------------------------------- 197 * Cache Configuration 198 */ 199 #define CONFIG_SYS_CACHELINE_SIZE 16 200 201 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 202 CONFIG_SYS_INIT_RAM_SIZE - 8) 203 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 204 CONFIG_SYS_INIT_RAM_SIZE - 4) 205 #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI) 206 #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ 207 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ 208 CF_ACR_EN | CF_ACR_SM_ALL) 209 #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \ 210 CF_CACR_DISD | CF_CACR_INVI | \ 211 CF_CACR_CEIB | CF_CACR_DCM | \ 212 CF_CACR_EUSP) 213 214 /*----------------------------------------------------------------------- 215 * Memory bank definitions 216 */ 217 #define CONFIG_SYS_CS0_BASE 0xffe00000 218 #define CONFIG_SYS_CS0_CTRL 0x00001980 219 #define CONFIG_SYS_CS0_MASK 0x001F0001 220 221 #define CONFIG_SYS_CS1_BASE 0x30000000 222 #define CONFIG_SYS_CS1_CTRL 0x00001900 223 #define CONFIG_SYS_CS1_MASK 0x00070001 224 225 /*----------------------------------------------------------------------- 226 * Port configuration 227 */ 228 #define CONFIG_SYS_FECI2C 0x0FA0 229 230 #endif /* _M5275EVB_H */ 231