1 /* 2 * Configuation settings for the Motorola MC5275EVB board. 3 * 4 * By Arthur Shipkowski <art@videon-central.com> 5 * Copyright (C) 2005 Videon Central, Inc. 6 * 7 * Based off of M5272C3 board code by Josef Baumgartner 8 * <josef.baumgartner@telex.de> 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 /* 14 * board/config.h - configuration options, board specific 15 */ 16 17 #ifndef _M5275EVB_H 18 #define _M5275EVB_H 19 20 /* 21 * High Level Configuration Options 22 * (easy to change) 23 */ 24 #define CONFIG_M5275EVB /* define board type */ 25 26 #define CONFIG_MCFTMR 27 28 #define CONFIG_MCFUART 29 #define CONFIG_SYS_UART_PORT (0) 30 #define CONFIG_BAUDRATE 115200 31 32 /* Configuration for environment 33 * Environment is embedded in u-boot in the second sector of the flash 34 */ 35 #ifndef CONFIG_MONITOR_IS_IN_RAM 36 #define CONFIG_ENV_OFFSET 0x4000 37 #define CONFIG_ENV_SECT_SIZE 0x2000 38 #define CONFIG_ENV_IS_IN_FLASH 1 39 #else 40 #define CONFIG_ENV_ADDR 0xffe04000 41 #define CONFIG_ENV_SECT_SIZE 0x2000 42 #define CONFIG_ENV_IS_IN_FLASH 1 43 #endif 44 45 #define LDS_BOARD_TEXT \ 46 . = DEFINED(env_offset) ? env_offset : .; \ 47 common/env_embedded.o (.text); 48 49 /* 50 * BOOTP options 51 */ 52 #define CONFIG_BOOTP_BOOTFILESIZE 53 #define CONFIG_BOOTP_BOOTPATH 54 #define CONFIG_BOOTP_GATEWAY 55 #define CONFIG_BOOTP_HOSTNAME 56 57 /* Available command configuration */ 58 #include <config_cmd_default.h> 59 60 #define CONFIG_CMD_CACHE 61 #define CONFIG_CMD_PING 62 #define CONFIG_CMD_MII 63 #define CONFIG_CMD_NET 64 #define CONFIG_CMD_ELF 65 #define CONFIG_CMD_FLASH 66 #define CONFIG_CMD_I2C 67 #define CONFIG_CMD_MEMORY 68 #define CONFIG_CMD_DHCP 69 70 #undef CONFIG_CMD_LOADS 71 #undef CONFIG_CMD_LOADB 72 73 #define CONFIG_MCFFEC 74 #ifdef CONFIG_MCFFEC 75 #define CONFIG_MII 1 76 #define CONFIG_MII_INIT 1 77 #define CONFIG_SYS_DISCOVER_PHY 78 #define CONFIG_SYS_RX_ETH_BUFFER 8 79 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 80 #define CONFIG_SYS_FEC0_PINMUX 0 81 #define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE 82 #define CONFIG_SYS_FEC1_PINMUX 0 83 #define CONFIG_SYS_FEC1_MIIBASE CONFIG_SYS_FEC1_IOBASE 84 #define MCFFEC_TOUT_LOOP 50000 85 #define CONFIG_HAS_ETH1 86 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ 87 #ifndef CONFIG_SYS_DISCOVER_PHY 88 #define FECDUPLEX FULL 89 #define FECSPEED _100BASET 90 #else 91 #ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN 92 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 93 #endif 94 #endif 95 #endif 96 97 /* I2C */ 98 #define CONFIG_SYS_I2C 99 #define CONFIG_SYS_I2C_FSL 100 #define CONFIG_SYS_FSL_I2C_SPEED 80000 101 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F 102 #define CONFIG_SYS_FSL_I2C_OFFSET 0x00000300 103 #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR 104 #define CONFIG_SYS_I2C_PINMUX_REG (gpio_reg->par_feci2c) 105 #define CONFIG_SYS_I2C_PINMUX_CLR (0xFFF0) 106 #define CONFIG_SYS_I2C_PINMUX_SET (0x000F) 107 108 #define CONFIG_SYS_PROMPT "-> " 109 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 110 111 #if (CONFIG_CMD_KGDB) 112 # define CONFIG_SYS_CBSIZE 1024 113 #else 114 # define CONFIG_SYS_CBSIZE 256 115 #endif 116 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 117 #define CONFIG_SYS_MAXARGS 16 118 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 119 120 #define CONFIG_SYS_LOAD_ADDR 0x800000 121 122 #define CONFIG_BOOTDELAY 5 123 #define CONFIG_BOOTCOMMAND "bootm ffe40000" 124 #define CONFIG_SYS_MEMTEST_START 0x400 125 #define CONFIG_SYS_MEMTEST_END 0x380000 126 127 #ifdef CONFIG_MCFFEC 128 # define CONFIG_NET_RETRY_COUNT 5 129 # define CONFIG_OVERWRITE_ETHADDR_ONCE 130 #endif /* FEC_ENET */ 131 132 #define CONFIG_EXTRA_ENV_SETTINGS \ 133 "netdev=eth0\0" \ 134 "loadaddr=10000\0" \ 135 "uboot=u-boot.bin\0" \ 136 "load=tftp ${loadaddr} ${uboot}\0" \ 137 "upd=run load; run prog\0" \ 138 "prog=prot off ffe00000 ffe3ffff;" \ 139 "era ffe00000 ffe3ffff;" \ 140 "cp.b ${loadaddr} ffe00000 ${filesize};"\ 141 "save\0" \ 142 "" 143 144 #define CONFIG_SYS_CLK 150000000 145 146 /* 147 * Low Level Configuration Settings 148 * (address mappings, register initial values, etc.) 149 * You should know what you are doing if you make changes here. 150 */ 151 152 #define CONFIG_SYS_MBAR 0x40000000 153 154 /*----------------------------------------------------------------------- 155 * Definitions for initial stack pointer and data area (in DPRAM) 156 */ 157 #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 158 #define CONFIG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */ 159 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 160 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 161 162 /*----------------------------------------------------------------------- 163 * Start addresses for the final memory configuration 164 * (Set up by the startup code) 165 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 166 */ 167 #define CONFIG_SYS_SDRAM_BASE 0x00000000 168 #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ 169 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE 170 171 #ifdef CONFIG_MONITOR_IS_IN_RAM 172 #define CONFIG_SYS_MONITOR_BASE 0x20000 173 #else 174 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) 175 #endif 176 177 #define CONFIG_SYS_MONITOR_LEN 0x20000 178 #define CONFIG_SYS_MALLOC_LEN (256 << 10) 179 #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 180 181 /* 182 * For booting Linux, the board info and command line data 183 * have to be in the first 8 MB of memory, since this is 184 * the maximum mapped by the Linux kernel during initialization ?? 185 */ 186 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) 187 #define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20) 188 189 /*----------------------------------------------------------------------- 190 * FLASH organization 191 */ 192 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 193 #define CONFIG_SYS_MAX_FLASH_SECT 11 /* max number of sectors on one chip */ 194 #define CONFIG_SYS_FLASH_ERASE_TOUT 1000 195 196 #define CONFIG_SYS_FLASH_CFI 1 197 #define CONFIG_FLASH_CFI_DRIVER 1 198 #define CONFIG_SYS_FLASH_SIZE 0x200000 199 200 /*----------------------------------------------------------------------- 201 * Cache Configuration 202 */ 203 #define CONFIG_SYS_CACHELINE_SIZE 16 204 205 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 206 CONFIG_SYS_INIT_RAM_SIZE - 8) 207 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 208 CONFIG_SYS_INIT_RAM_SIZE - 4) 209 #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI) 210 #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ 211 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ 212 CF_ACR_EN | CF_ACR_SM_ALL) 213 #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \ 214 CF_CACR_DISD | CF_CACR_INVI | \ 215 CF_CACR_CEIB | CF_CACR_DCM | \ 216 CF_CACR_EUSP) 217 218 /*----------------------------------------------------------------------- 219 * Memory bank definitions 220 */ 221 #define CONFIG_SYS_CS0_BASE 0xffe00000 222 #define CONFIG_SYS_CS0_CTRL 0x00001980 223 #define CONFIG_SYS_CS0_MASK 0x001F0001 224 225 #define CONFIG_SYS_CS1_BASE 0x30000000 226 #define CONFIG_SYS_CS1_CTRL 0x00001900 227 #define CONFIG_SYS_CS1_MASK 0x00070001 228 229 /*----------------------------------------------------------------------- 230 * Port configuration 231 */ 232 #define CONFIG_SYS_FECI2C 0x0FA0 233 234 #endif /* _M5275EVB_H */ 235