xref: /openbmc/u-boot/include/configs/M5275EVB.h (revision 00f792e0)
1 /*
2  * Configuation settings for the Motorola MC5275EVB board.
3  *
4  * By Arthur Shipkowski <art@videon-central.com>
5  * Copyright (C) 2005 Videon Central, Inc.
6  *
7  * Based off of M5272C3 board code by Josef Baumgartner
8  * <josef.baumgartner@telex.de>
9  *
10  * See file CREDITS for list of people who contributed to this
11  * project.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License as
15  * published by the Free Software Foundation; either version 2 of
16  * the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software
25  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26  * MA 02111-1307 USA
27  */
28 
29 /*
30  * board/config.h - configuration options, board specific
31  */
32 
33 #ifndef _M5275EVB_H
34 #define _M5275EVB_H
35 
36 /*
37  * High Level Configuration Options
38  * (easy to change)
39  */
40 #define CONFIG_MCF52x2			/* define processor family */
41 #define CONFIG_M5275			/* define processor type */
42 #define CONFIG_M5275EVB			/* define board type */
43 
44 #define CONFIG_MCFTMR
45 
46 #define CONFIG_MCFUART
47 #define CONFIG_SYS_UART_PORT		(0)
48 #define CONFIG_BAUDRATE		115200
49 
50 /* Configuration for environment
51  * Environment is embedded in u-boot in the second sector of the flash
52  */
53 #ifndef CONFIG_MONITOR_IS_IN_RAM
54 #define CONFIG_ENV_OFFSET		0x4000
55 #define CONFIG_ENV_SECT_SIZE	0x2000
56 #define CONFIG_ENV_IS_IN_FLASH	1
57 #else
58 #define CONFIG_ENV_ADDR		0xffe04000
59 #define CONFIG_ENV_SECT_SIZE	0x2000
60 #define CONFIG_ENV_IS_IN_FLASH	1
61 #endif
62 
63 /*
64  * BOOTP options
65  */
66 #define CONFIG_BOOTP_BOOTFILESIZE
67 #define CONFIG_BOOTP_BOOTPATH
68 #define CONFIG_BOOTP_GATEWAY
69 #define CONFIG_BOOTP_HOSTNAME
70 
71 /* Available command configuration */
72 #include <config_cmd_default.h>
73 
74 #define CONFIG_CMD_CACHE
75 #define CONFIG_CMD_PING
76 #define CONFIG_CMD_MII
77 #define CONFIG_CMD_NET
78 #define CONFIG_CMD_ELF
79 #define CONFIG_CMD_FLASH
80 #define CONFIG_CMD_I2C
81 #define CONFIG_CMD_MEMORY
82 #define CONFIG_CMD_DHCP
83 
84 #undef CONFIG_CMD_LOADS
85 #undef CONFIG_CMD_LOADB
86 
87 #define CONFIG_MCFFEC
88 #ifdef CONFIG_MCFFEC
89 #define CONFIG_MII		1
90 #define CONFIG_MII_INIT		1
91 #define CONFIG_SYS_DISCOVER_PHY
92 #define CONFIG_SYS_RX_ETH_BUFFER	8
93 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
94 #define CONFIG_SYS_FEC0_PINMUX		0
95 #define CONFIG_SYS_FEC0_MIIBASE	CONFIG_SYS_FEC0_IOBASE
96 #define CONFIG_SYS_FEC1_PINMUX		0
97 #define CONFIG_SYS_FEC1_MIIBASE	CONFIG_SYS_FEC1_IOBASE
98 #define MCFFEC_TOUT_LOOP	50000
99 #define CONFIG_HAS_ETH1
100 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
101 #ifndef CONFIG_SYS_DISCOVER_PHY
102 #define FECDUPLEX		FULL
103 #define FECSPEED		_100BASET
104 #else
105 #ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
106 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
107 #endif
108 #endif
109 #endif
110 
111 /* I2C */
112 #define CONFIG_SYS_I2C
113 #define CONFIG_SYS_I2C_FSL
114 #define CONFIG_SYS_FSL_I2C_SPEED	80000
115 #define CONFIG_SYS_FSL_I2C_SLAVE	0x7F
116 #define CONFIG_SYS_FSL_I2C_OFFSET	0x00000300
117 #define CONFIG_SYS_IMMR		CONFIG_SYS_MBAR
118 #define CONFIG_SYS_I2C_PINMUX_REG	(gpio_reg->par_feci2c)
119 #define CONFIG_SYS_I2C_PINMUX_CLR	(0xFFF0)
120 #define CONFIG_SYS_I2C_PINMUX_SET	(0x000F)
121 
122 #define CONFIG_SYS_PROMPT		"-> "
123 #define CONFIG_SYS_LONGHELP		/* undef to save memory	*/
124 
125 #if (CONFIG_CMD_KGDB)
126 #	define CONFIG_SYS_CBSIZE	1024
127 #else
128 #	define CONFIG_SYS_CBSIZE	256
129 #endif
130 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
131 #define CONFIG_SYS_MAXARGS		16
132 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
133 
134 #define CONFIG_SYS_LOAD_ADDR		0x800000
135 
136 #define CONFIG_BOOTDELAY	5
137 #define CONFIG_BOOTCOMMAND	"bootm ffe40000"
138 #define CONFIG_SYS_MEMTEST_START	0x400
139 #define CONFIG_SYS_MEMTEST_END		0x380000
140 
141 #ifdef CONFIG_MCFFEC
142 #	define CONFIG_NET_RETRY_COUNT	5
143 #	define CONFIG_OVERWRITE_ETHADDR_ONCE
144 #endif				/* FEC_ENET */
145 
146 #define CONFIG_EXTRA_ENV_SETTINGS		\
147 	"netdev=eth0\0"				\
148 	"loadaddr=10000\0"			\
149 	"uboot=u-boot.bin\0"			\
150 	"load=tftp ${loadaddr} ${uboot}\0"	\
151 	"upd=run load; run prog\0"		\
152 	"prog=prot off ffe00000 ffe3ffff;"	\
153 	"era ffe00000 ffe3ffff;"		\
154 	"cp.b ${loadaddr} ffe00000 ${filesize};"\
155 	"save\0"				\
156 	""
157 
158 #define CONFIG_SYS_HZ			1000
159 #define CONFIG_SYS_CLK			150000000
160 
161 /*
162  * Low Level Configuration Settings
163  * (address mappings, register initial values, etc.)
164  * You should know what you are doing if you make changes here.
165  */
166 
167 #define CONFIG_SYS_MBAR		0x40000000
168 
169 /*-----------------------------------------------------------------------
170  * Definitions for initial stack pointer and data area (in DPRAM)
171  */
172 #define CONFIG_SYS_INIT_RAM_ADDR	0x20000000
173 #define CONFIG_SYS_INIT_RAM_SIZE	0x10000	/* Size of used area in internal SRAM */
174 #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
175 #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
176 
177 /*-----------------------------------------------------------------------
178  * Start addresses for the final memory configuration
179  * (Set up by the startup code)
180  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
181  */
182 #define CONFIG_SYS_SDRAM_BASE		0x00000000
183 #define CONFIG_SYS_SDRAM_SIZE		16	/* SDRAM size in MB */
184 #define CONFIG_SYS_FLASH_BASE		CONFIG_SYS_CS0_BASE
185 
186 #ifdef CONFIG_MONITOR_IS_IN_RAM
187 #define CONFIG_SYS_MONITOR_BASE	0x20000
188 #else
189 #define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_FLASH_BASE + 0x400)
190 #endif
191 
192 #define CONFIG_SYS_MONITOR_LEN		0x20000
193 #define CONFIG_SYS_MALLOC_LEN		(256 << 10)
194 #define CONFIG_SYS_BOOTPARAMS_LEN	64*1024
195 
196 /*
197  * For booting Linux, the board info and command line data
198  * have to be in the first 8 MB of memory, since this is
199  * the maximum mapped by the Linux kernel during initialization ??
200  */
201 #define CONFIG_SYS_BOOTMAPSZ		(CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
202 #define CONFIG_SYS_BOOTM_LEN		(CONFIG_SYS_SDRAM_SIZE << 20)
203 
204 /*-----------------------------------------------------------------------
205  * FLASH organization
206  */
207 #define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max number of memory banks */
208 #define CONFIG_SYS_MAX_FLASH_SECT	11	/* max number of sectors on one chip */
209 #define CONFIG_SYS_FLASH_ERASE_TOUT	1000
210 
211 #define CONFIG_SYS_FLASH_CFI		1
212 #define CONFIG_FLASH_CFI_DRIVER	1
213 #define CONFIG_SYS_FLASH_SIZE		0x200000
214 
215 /*-----------------------------------------------------------------------
216  * Cache Configuration
217  */
218 #define CONFIG_SYS_CACHELINE_SIZE	16
219 
220 #define ICACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
221 					 CONFIG_SYS_INIT_RAM_SIZE - 8)
222 #define DCACHE_STATUS			(CONFIG_SYS_INIT_RAM_ADDR + \
223 					 CONFIG_SYS_INIT_RAM_SIZE - 4)
224 #define CONFIG_SYS_ICACHE_INV		(CF_CACR_CINV | CF_CACR_INVI)
225 #define CONFIG_SYS_CACHE_ACR0		(CONFIG_SYS_SDRAM_BASE | \
226 					 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
227 					 CF_ACR_EN | CF_ACR_SM_ALL)
228 #define CONFIG_SYS_CACHE_ICACR		(CF_CACR_CENB | CF_CACR_CINV | \
229 					 CF_CACR_DISD | CF_CACR_INVI | \
230 					 CF_CACR_CEIB | CF_CACR_DCM | \
231 					 CF_CACR_EUSP)
232 
233 /*-----------------------------------------------------------------------
234  * Memory bank definitions
235  */
236 #define CONFIG_SYS_CS0_BASE		0xffe00000
237 #define CONFIG_SYS_CS0_CTRL		0x00001980
238 #define CONFIG_SYS_CS0_MASK		0x001F0001
239 
240 #define CONFIG_SYS_CS1_BASE		0x30000000
241 #define CONFIG_SYS_CS1_CTRL		0x00001900
242 #define CONFIG_SYS_CS1_MASK		0x00070001
243 
244 /*-----------------------------------------------------------------------
245  * Port configuration
246  */
247 #define CONFIG_SYS_FECI2C		0x0FA0
248 
249 #endif	/* _M5275EVB_H */
250