1 /* 2 * Configuation settings for the Motorola MC5272C3 board. 3 * 4 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de> 5 * 6 * See file CREDITS for list of people who contributed to this 7 * project. 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of 12 * the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22 * MA 02111-1307 USA 23 */ 24 25 /* 26 * board/config.h - configuration options, board specific 27 */ 28 29 #ifndef _M5272C3_H 30 #define _M5272C3_H 31 32 /* 33 * High Level Configuration Options 34 * (easy to change) 35 */ 36 #define CONFIG_MCF52x2 /* define processor family */ 37 #define CONFIG_M5272 /* define processor type */ 38 39 #define FEC_ENET 40 41 #define CONFIG_BAUDRATE 19200 42 #define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 } 43 44 #define CONFIG_WATCHDOG 45 #define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */ 46 47 #define CONFIG_MONITOR_IS_IN_RAM /* define if monitor is started from a pre-loader */ 48 49 /* Configuration for environment 50 * Environment is embedded in u-boot in the second sector of the flash 51 */ 52 #ifndef CONFIG_MONITOR_IS_IN_RAM 53 #define CFG_ENV_OFFSET 0x4000 54 #define CFG_ENV_SECT_SIZE 0x2000 55 #define CFG_ENV_IS_IN_FLASH 1 56 #define CFG_ENV_IS_EMBEDDED 1 57 #else 58 #define CFG_ENV_ADDR 0xffe04000 59 #define CFG_ENV_SECT_SIZE 0x2000 60 #define CFG_ENV_IS_IN_FLASH 1 61 #endif 62 63 64 /* 65 * Command line configuration. 66 */ 67 #include <config_cmd_default.h> 68 69 #define CONFIG_CMD_MII 70 71 #undef CONFIG_CMD_LOADS 72 #undef CONFIG_CMD_LOADB 73 74 75 #define CONFIG_BOOTDELAY 5 76 77 #define CFG_PROMPT "-> " 78 #define CFG_LONGHELP /* undef to save memory */ 79 80 #if defined(CONFIG_CMD_KGDB) 81 #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ 82 #else 83 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ 84 #endif 85 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ 86 #define CFG_MAXARGS 16 /* max number of command args */ 87 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ 88 89 #define CFG_LOAD_ADDR 0x20000 90 91 #define CFG_MEMTEST_START 0x400 92 #define CFG_MEMTEST_END 0x380000 93 94 #define CFG_HZ 1000 95 #define CFG_CLK 66000000 96 97 /* 98 * Low Level Configuration Settings 99 * (address mappings, register initial values, etc.) 100 * You should know what you are doing if you make changes here. 101 */ 102 103 #define CFG_MBAR 0x10000000 /* Register Base Addrs */ 104 105 #define CFG_SCR 0x0003; 106 #define CFG_SPR 0xffff; 107 108 #define CFG_DISCOVER_PHY 109 #define CFG_ENET_BD_BASE 0x380000 110 111 /*----------------------------------------------------------------------- 112 * Definitions for initial stack pointer and data area (in DPRAM) 113 */ 114 #define CFG_INIT_RAM_ADDR 0x20000000 115 #define CFG_INIT_RAM_END 0x1000 /* End of used area in internal SRAM */ 116 #define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */ 117 #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) 118 #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET 119 120 /*----------------------------------------------------------------------- 121 * Start addresses for the final memory configuration 122 * (Set up by the startup code) 123 * Please note that CFG_SDRAM_BASE _must_ start at 0 124 */ 125 #define CFG_SDRAM_BASE 0x00000000 126 #define CFG_SDRAM_SIZE 4 /* SDRAM size in MB */ 127 #define CFG_FLASH_BASE 0xffe00000 128 129 #ifdef CONFIG_MONITOR_IS_IN_RAM 130 #define CFG_MONITOR_BASE 0x20000 131 #else 132 #define CFG_MONITOR_BASE (CFG_FLASH_BASE + 0x400) 133 #endif 134 135 #define CFG_MONITOR_LEN 0x20000 136 #define CFG_MALLOC_LEN (256 << 10) 137 #define CFG_BOOTPARAMS_LEN 64*1024 138 139 /* 140 * For booting Linux, the board info and command line data 141 * have to be in the first 8 MB of memory, since this is 142 * the maximum mapped by the Linux kernel during initialization ?? 143 */ 144 #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ 145 146 /*----------------------------------------------------------------------- 147 * FLASH organization 148 */ 149 #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ 150 #define CFG_MAX_FLASH_SECT 11 /* max number of sectors on one chip */ 151 #define CFG_FLASH_ERASE_TOUT 1000 152 153 /*----------------------------------------------------------------------- 154 * Cache Configuration 155 */ 156 #define CFG_CACHELINE_SIZE 16 157 158 /*----------------------------------------------------------------------- 159 * Memory bank definitions 160 */ 161 #define CFG_BR0_PRELIM 0xFFE00201 162 #define CFG_OR0_PRELIM 0xFFE00014 163 164 #define CFG_BR1_PRELIM 0 165 #define CFG_OR1_PRELIM 0 166 167 #define CFG_BR2_PRELIM 0x30000001 168 #define CFG_OR2_PRELIM 0xFFF80000 169 170 #define CFG_BR3_PRELIM 0 171 #define CFG_OR3_PRELIM 0 172 173 #define CFG_BR4_PRELIM 0 174 #define CFG_OR4_PRELIM 0 175 176 #define CFG_BR5_PRELIM 0 177 #define CFG_OR5_PRELIM 0 178 179 #define CFG_BR6_PRELIM 0 180 #define CFG_OR6_PRELIM 0 181 182 #define CFG_BR7_PRELIM 0x00000701 183 #define CFG_OR7_PRELIM 0xFFC0007C 184 185 /*----------------------------------------------------------------------- 186 * Port configuration 187 */ 188 #define CFG_PACNT 0x00000000 189 #define CFG_PADDR 0x0000 190 #define CFG_PADAT 0x0000 191 #define CFG_PBCNT 0x55554155 /* Ethernet/UART configuration */ 192 #define CFG_PBDDR 0x0000 193 #define CFG_PBDAT 0x0000 194 #define CFG_PDCNT 0x00000000 195 196 #endif /* _M5272C3_H */ 197