1 /* 2 * Configuation settings for the Motorola MC5272C3 board. 3 * 4 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 /* 10 * board/config.h - configuration options, board specific 11 */ 12 13 #ifndef _M5272C3_H 14 #define _M5272C3_H 15 16 /* 17 * High Level Configuration Options 18 * (easy to change) 19 */ 20 #define CONFIG_MCF52x2 /* define processor family */ 21 #define CONFIG_M5272 /* define processor type */ 22 23 #define CONFIG_MCFTMR 24 25 #define CONFIG_MCFUART 26 #define CONFIG_SYS_UART_PORT (0) 27 #define CONFIG_BAUDRATE 115200 28 29 #undef CONFIG_WATCHDOG 30 #define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */ 31 32 #undef CONFIG_MONITOR_IS_IN_RAM /* define if monitor is started from a pre-loader */ 33 34 /* Configuration for environment 35 * Environment is embedded in u-boot in the second sector of the flash 36 */ 37 #ifndef CONFIG_MONITOR_IS_IN_RAM 38 #define CONFIG_ENV_OFFSET 0x4000 39 #define CONFIG_ENV_SECT_SIZE 0x2000 40 #define CONFIG_ENV_IS_IN_FLASH 1 41 #else 42 #define CONFIG_ENV_ADDR 0xffe04000 43 #define CONFIG_ENV_SECT_SIZE 0x2000 44 #define CONFIG_ENV_IS_IN_FLASH 1 45 #endif 46 47 /* 48 * BOOTP options 49 */ 50 #define CONFIG_BOOTP_BOOTFILESIZE 51 #define CONFIG_BOOTP_BOOTPATH 52 #define CONFIG_BOOTP_GATEWAY 53 #define CONFIG_BOOTP_HOSTNAME 54 55 /* 56 * Command line configuration. 57 */ 58 #include <config_cmd_default.h> 59 60 #define CONFIG_CMD_CACHE 61 #define CONFIG_CMD_MII 62 #define CONFIG_CMD_NET 63 #define CONFIG_CMD_PING 64 #define CONFIG_CMD_MISC 65 #define CONFIG_CMD_ELF 66 #define CONFIG_CMD_FLASH 67 #define CONFIG_CMD_MEMORY 68 69 #undef CONFIG_CMD_LOADS 70 #undef CONFIG_CMD_LOADB 71 72 #define CONFIG_BOOTDELAY 5 73 #define CONFIG_MCFFEC 74 #ifdef CONFIG_MCFFEC 75 # define CONFIG_MII 1 76 # define CONFIG_MII_INIT 1 77 # define CONFIG_SYS_DISCOVER_PHY 78 # define CONFIG_SYS_RX_ETH_BUFFER 8 79 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 80 81 # define CONFIG_SYS_FEC0_PINMUX 0 82 # define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE 83 # define MCFFEC_TOUT_LOOP 50000 84 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ 85 # ifndef CONFIG_SYS_DISCOVER_PHY 86 # define FECDUPLEX FULL 87 # define FECSPEED _100BASET 88 # else 89 # ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN 90 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 91 # endif 92 # endif /* CONFIG_SYS_DISCOVER_PHY */ 93 #endif 94 95 #ifdef CONFIG_MCFFEC 96 # define CONFIG_ETHADDR 00:e0:0c:bc:e5:60 97 # define CONFIG_IPADDR 192.162.1.2 98 # define CONFIG_NETMASK 255.255.255.0 99 # define CONFIG_SERVERIP 192.162.1.1 100 # define CONFIG_GATEWAYIP 192.162.1.1 101 # define CONFIG_OVERWRITE_ETHADDR_ONCE 102 #endif /* CONFIG_MCFFEC */ 103 104 #define CONFIG_HOSTNAME M5272C3 105 #define CONFIG_EXTRA_ENV_SETTINGS \ 106 "netdev=eth0\0" \ 107 "loadaddr=10000\0" \ 108 "u-boot=u-boot.bin\0" \ 109 "load=tftp ${loadaddr) ${u-boot}\0" \ 110 "upd=run load; run prog\0" \ 111 "prog=prot off ffe00000 ffe3ffff;" \ 112 "era ffe00000 ffe3ffff;" \ 113 "cp.b ${loadaddr} ffe00000 ${filesize};"\ 114 "save\0" \ 115 "" 116 117 #define CONFIG_SYS_PROMPT "-> " 118 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 119 120 #if defined(CONFIG_CMD_KGDB) 121 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 122 #else 123 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 124 #endif 125 126 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ 127 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 128 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 129 #define CONFIG_SYS_LOAD_ADDR 0x20000 130 #define CONFIG_SYS_MEMTEST_START 0x400 131 #define CONFIG_SYS_MEMTEST_END 0x380000 132 #define CONFIG_SYS_CLK 66000000 133 134 /* 135 * Low Level Configuration Settings 136 * (address mappings, register initial values, etc.) 137 * You should know what you are doing if you make changes here. 138 */ 139 #define CONFIG_SYS_MBAR 0x10000000 /* Register Base Addrs */ 140 #define CONFIG_SYS_SCR 0x0003 141 #define CONFIG_SYS_SPR 0xffff 142 143 /*----------------------------------------------------------------------- 144 * Definitions for initial stack pointer and data area (in DPRAM) 145 */ 146 #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 147 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */ 148 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 149 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 150 151 /*----------------------------------------------------------------------- 152 * Start addresses for the final memory configuration 153 * (Set up by the startup code) 154 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 155 */ 156 #define CONFIG_SYS_SDRAM_BASE 0x00000000 157 #define CONFIG_SYS_SDRAM_SIZE 4 /* SDRAM size in MB */ 158 #define CONFIG_SYS_FLASH_BASE 0xffe00000 159 160 #ifdef CONFIG_MONITOR_IS_IN_RAM 161 #define CONFIG_SYS_MONITOR_BASE 0x20000 162 #else 163 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) 164 #endif 165 166 #define CONFIG_SYS_MONITOR_LEN 0x20000 167 #define CONFIG_SYS_MALLOC_LEN (256 << 10) 168 #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 169 170 /* 171 * For booting Linux, the board info and command line data 172 * have to be in the first 8 MB of memory, since this is 173 * the maximum mapped by the Linux kernel during initialization ?? 174 */ 175 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) 176 177 /* 178 * FLASH organization 179 */ 180 #define CONFIG_SYS_FLASH_CFI 181 #ifdef CONFIG_SYS_FLASH_CFI 182 # define CONFIG_FLASH_CFI_DRIVER 1 183 # define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */ 184 # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 185 # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 186 # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ 187 # define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ 188 #endif 189 190 /*----------------------------------------------------------------------- 191 * Cache Configuration 192 */ 193 #define CONFIG_SYS_CACHELINE_SIZE 16 194 195 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 196 CONFIG_SYS_INIT_RAM_SIZE - 8) 197 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 198 CONFIG_SYS_INIT_RAM_SIZE - 4) 199 #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI) 200 #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ 201 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ 202 CF_ACR_EN | CF_ACR_SM_ALL) 203 #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \ 204 CF_CACR_DISD | CF_CACR_INVI | \ 205 CF_CACR_CEIB | CF_CACR_DCM | \ 206 CF_CACR_EUSP) 207 208 /*----------------------------------------------------------------------- 209 * Memory bank definitions 210 */ 211 #define CONFIG_SYS_BR0_PRELIM 0xFFE00201 212 #define CONFIG_SYS_OR0_PRELIM 0xFFE00014 213 #define CONFIG_SYS_BR1_PRELIM 0 214 #define CONFIG_SYS_OR1_PRELIM 0 215 #define CONFIG_SYS_BR2_PRELIM 0x30000001 216 #define CONFIG_SYS_OR2_PRELIM 0xFFF80000 217 #define CONFIG_SYS_BR3_PRELIM 0 218 #define CONFIG_SYS_OR3_PRELIM 0 219 #define CONFIG_SYS_BR4_PRELIM 0 220 #define CONFIG_SYS_OR4_PRELIM 0 221 #define CONFIG_SYS_BR5_PRELIM 0 222 #define CONFIG_SYS_OR5_PRELIM 0 223 #define CONFIG_SYS_BR6_PRELIM 0 224 #define CONFIG_SYS_OR6_PRELIM 0 225 #define CONFIG_SYS_BR7_PRELIM 0x00000701 226 #define CONFIG_SYS_OR7_PRELIM 0xFFC0007C 227 228 /*----------------------------------------------------------------------- 229 * Port configuration 230 */ 231 #define CONFIG_SYS_PACNT 0x00000000 232 #define CONFIG_SYS_PADDR 0x0000 233 #define CONFIG_SYS_PADAT 0x0000 234 #define CONFIG_SYS_PBCNT 0x55554155 /* Ethernet/UART configuration */ 235 #define CONFIG_SYS_PBDDR 0x0000 236 #define CONFIG_SYS_PBDAT 0x0000 237 #define CONFIG_SYS_PDCNT 0x00000000 238 #endif /* _M5272C3_H */ 239